* [PATCH v2] docs: Add 'S' to Machine Constraints for RISC-V
@ 2021-07-12 4:29 Kito Cheng
2021-07-12 4:47 ` Fangrui Song
2021-07-15 15:25 ` Palmer Dabbelt
0 siblings, 2 replies; 4+ messages in thread
From: Kito Cheng @ 2021-07-12 4:29 UTC (permalink / raw)
To: gcc-patches, kito.cheng, jimw, i, palmer; +Cc: Kito Cheng
It was undocument before, but it might used in linux kernel for resolve
code model issue, so LLVM community suggest we should document that,
so that make it become supported/documented/non-internal machine constraints.
gcc/ChangeLog:
PR target/101275
* config/riscv/constraints.md ("S"): Update description and remove
@internal.
* doc/md.texi (Machine Constraints): Document the 'S' constraints
for RISC-V.
---
gcc/config/riscv/constraints.md | 3 +--
gcc/doc/md.texi | 3 +++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
index 8c15c6c0486..c87d5b796a5 100644
--- a/gcc/config/riscv/constraints.md
+++ b/gcc/config/riscv/constraints.md
@@ -67,8 +67,7 @@ (define_memory_constraint "A"
(match_test "GET_CODE(XEXP(op,0)) == REG")))
(define_constraint "S"
- "@internal
- A constant call address."
+ "A constraint that matches an absolute symbolic address."
(match_operand 0 "absolute_symbolic_operand"))
(define_constraint "U"
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 00caf3844cc..2d120da96cf 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions.
@item A
An address that is held in a general-purpose register.
+@item S
+A constraint that matches an absolute symbolic address.
+
@end table
@item RX---@file{config/rx/constraints.md}
--
2.31.1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2] docs: Add 'S' to Machine Constraints for RISC-V
2021-07-12 4:29 [PATCH v2] docs: Add 'S' to Machine Constraints for RISC-V Kito Cheng
@ 2021-07-12 4:47 ` Fangrui Song
2021-07-13 6:11 ` Kito Cheng
2021-07-15 15:25 ` Palmer Dabbelt
1 sibling, 1 reply; 4+ messages in thread
From: Fangrui Song @ 2021-07-12 4:47 UTC (permalink / raw)
To: Kito Cheng; +Cc: gcc-patches, kito.cheng, jimw, palmer
On 2021-07-12, Kito Cheng wrote:
>It was undocument before, but it might used in linux kernel for resolve
>code model issue, so LLVM community suggest we should document that,
>so that make it become supported/documented/non-internal machine constraints.
>
>gcc/ChangeLog:
>
> PR target/101275
> * config/riscv/constraints.md ("S"): Update description and remove
> @internal.
> * doc/md.texi (Machine Constraints): Document the 'S' constraints
> for RISC-V.
>---
> gcc/config/riscv/constraints.md | 3 +--
> gcc/doc/md.texi | 3 +++
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
>diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
>index 8c15c6c0486..c87d5b796a5 100644
>--- a/gcc/config/riscv/constraints.md
>+++ b/gcc/config/riscv/constraints.md
>@@ -67,8 +67,7 @@ (define_memory_constraint "A"
> (match_test "GET_CODE(XEXP(op,0)) == REG")))
>
> (define_constraint "S"
>- "@internal
>- A constant call address."
>+ "A constraint that matches an absolute symbolic address."
> (match_operand 0 "absolute_symbolic_operand"))
>
> (define_constraint "U"
>diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
>index 00caf3844cc..2d120da96cf 100644
>--- a/gcc/doc/md.texi
>+++ b/gcc/doc/md.texi
>@@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions.
> @item A
> An address that is held in a general-purpose register.
>
>+@item S
>+A constraint that matches an absolute symbolic address.
>+
> @end table
>
> @item RX---@file{config/rx/constraints.md}
>--
>2.31.1
LGTM
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2] docs: Add 'S' to Machine Constraints for RISC-V
2021-07-12 4:47 ` Fangrui Song
@ 2021-07-13 6:11 ` Kito Cheng
0 siblings, 0 replies; 4+ messages in thread
From: Kito Cheng @ 2021-07-13 6:11 UTC (permalink / raw)
To: Fangrui Song; +Cc: Kito Cheng, GCC Patches
committed to trunk.
On Mon, Jul 12, 2021 at 12:48 PM Fangrui Song <i@maskray.me> wrote:
>
> On 2021-07-12, Kito Cheng wrote:
> >It was undocument before, but it might used in linux kernel for resolve
> >code model issue, so LLVM community suggest we should document that,
> >so that make it become supported/documented/non-internal machine constraints.
> >
> >gcc/ChangeLog:
> >
> > PR target/101275
> > * config/riscv/constraints.md ("S"): Update description and remove
> > @internal.
> > * doc/md.texi (Machine Constraints): Document the 'S' constraints
> > for RISC-V.
> >---
> > gcc/config/riscv/constraints.md | 3 +--
> > gcc/doc/md.texi | 3 +++
> > 2 files changed, 4 insertions(+), 2 deletions(-)
> >
> >diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
> >index 8c15c6c0486..c87d5b796a5 100644
> >--- a/gcc/config/riscv/constraints.md
> >+++ b/gcc/config/riscv/constraints.md
> >@@ -67,8 +67,7 @@ (define_memory_constraint "A"
> > (match_test "GET_CODE(XEXP(op,0)) == REG")))
> >
> > (define_constraint "S"
> >- "@internal
> >- A constant call address."
> >+ "A constraint that matches an absolute symbolic address."
> > (match_operand 0 "absolute_symbolic_operand"))
> >
> > (define_constraint "U"
> >diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
> >index 00caf3844cc..2d120da96cf 100644
> >--- a/gcc/doc/md.texi
> >+++ b/gcc/doc/md.texi
> >@@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions.
> > @item A
> > An address that is held in a general-purpose register.
> >
> >+@item S
> >+A constraint that matches an absolute symbolic address.
> >+
> > @end table
> >
> > @item RX---@file{config/rx/constraints.md}
> >--
> >2.31.1
>
> LGTM
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] docs: Add 'S' to Machine Constraints for RISC-V
2021-07-12 4:29 [PATCH v2] docs: Add 'S' to Machine Constraints for RISC-V Kito Cheng
2021-07-12 4:47 ` Fangrui Song
@ 2021-07-15 15:25 ` Palmer Dabbelt
1 sibling, 0 replies; 4+ messages in thread
From: Palmer Dabbelt @ 2021-07-15 15:25 UTC (permalink / raw)
To: kito.cheng; +Cc: gcc-patches, Kito Cheng, Jim Wilson, i, kito.cheng
On Sun, 11 Jul 2021 21:29:13 PDT (-0700), kito.cheng@sifive.com wrote:
> It was undocument before, but it might used in linux kernel for resolve
> code model issue, so LLVM community suggest we should document that,
> so that make it become supported/documented/non-internal machine constraints.
>
> gcc/ChangeLog:
>
> PR target/101275
> * config/riscv/constraints.md ("S"): Update description and remove
> @internal.
> * doc/md.texi (Machine Constraints): Document the 'S' constraints
> for RISC-V.
> ---
> gcc/config/riscv/constraints.md | 3 +--
> gcc/doc/md.texi | 3 +++
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
> index 8c15c6c0486..c87d5b796a5 100644
> --- a/gcc/config/riscv/constraints.md
> +++ b/gcc/config/riscv/constraints.md
> @@ -67,8 +67,7 @@ (define_memory_constraint "A"
> (match_test "GET_CODE(XEXP(op,0)) == REG")))
>
> (define_constraint "S"
> - "@internal
> - A constant call address."
> + "A constraint that matches an absolute symbolic address."
> (match_operand 0 "absolute_symbolic_operand"))
>
> (define_constraint "U"
> diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
> index 00caf3844cc..2d120da96cf 100644
> --- a/gcc/doc/md.texi
> +++ b/gcc/doc/md.texi
> @@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions.
> @item A
> An address that is held in a general-purpose register.
>
> +@item S
> +A constraint that matches an absolute symbolic address.
> +
> @end table
>
> @item RX---@file{config/rx/constraints.md}
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2021-07-12 4:29 [PATCH v2] docs: Add 'S' to Machine Constraints for RISC-V Kito Cheng
2021-07-12 4:47 ` Fangrui Song
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