From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by sourceware.org (Postfix) with ESMTPS id 42D4D3858C2A for ; Wed, 3 Jan 2024 03:12:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 42D4D3858C2A Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 42D4D3858C2A Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::629 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704251525; cv=none; b=kC34Etn0zXo7tpvFWVELorz4FChWPsexty5Ss71qElm1fgNSzQaR2QwdfqPPVe0cyVjTzdTXq2HdVF2qrNXxkaXbNXZvasuHJKrLWlYn2l7EpqbZ7UEXG2E0jAQ53T6DZn8F6r9/M4ZswU8J+Cc7p0HNqyi/OaTbDuL7CBb0fNg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704251525; c=relaxed/simple; bh=SGN2g40Q09EZ2ZrSqf9x+KirIJ4bP9tB9XHZ+9qwGdk=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=KcB1qjbHMtwf0jiTwh/pfPGU/lCVImkjagVpvctk2Qf+xeZH9u2NAf1kVsBDZlGxBW2fMAJySxB+RMy3XFY210u7aXuYFwMV//wYJwSwHPMXQvM5qDOCoYjokPFMUPsAeOuWcQg4TbGQnusDi0vlE23bqJYkFWBmHp8lEn/bSTw= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-a27cc66d67eso289900866b.2 for ; Tue, 02 Jan 2024 19:12:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704251522; x=1704856322; darn=gcc.gnu.org; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=fVwka+b09R0qslhG6g3dxtthAE38h/ZzGaifqpyWdo0=; b=UZDrn3rJ6SD13NuM6Tx5xafM6srq2k1tkbEx21eJDQXhBD+ycReo5qHHRi4G7hYY34 xggDKPWBoOASYyuUWAVBowesNQ9Cyc+W6gFsok/ZyqyYij0WasrejboVg2v6H9P0KEG8 YnS9gPwy3EOS9zI7NNDFfRQ6Wew2NMSzO4VS9p0qVlkFdRR+4GowHgw0447vB84bQvTu gFYXfrVlZesfxVYnth5OX3v4LN6VqNaAJC1lBNUwgPRkx3W4dwLjt1Osj3URl3dWNioo IsmSp69TBbsaN3kccWMjdL1XY7LcEmMTyNiGHSR+7rhzElcyE2bqkuS7RSHkMYSFH1y5 BSIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704251522; x=1704856322; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=fVwka+b09R0qslhG6g3dxtthAE38h/ZzGaifqpyWdo0=; b=Fb+SYKZgUzXaoISI4BEJuqBYs20wWPXDftRSaIsghnqM2bFKNZ8KTeHULX9QXQBTaZ +OQ8dkBDno5QtlTH9TtSpKsGzBhURjZSRp2JgXZy+D8/VVp9pQKL9vX/v96bdWsaZX12 kGdYPKDEW4wNXksc1tP6WVf6zV2mkJj0QV4W7DE63M7Zekl5GbbaAofYgdIhlsvmNPio WGy/sE809u6kxyG+iivlkSIpODoHnoT0Yi0tGNtfKyuIkLI4JBhine2Sqz9voFqyGENu jO6JPysWc18Z9yZO/vnzjTDET85F832FQg6J88TcLmazNLE15cJ+UOeiYIN7nsGMI7zQ unIw== X-Gm-Message-State: AOJu0YwVDcAimHHJ8qfAwkcIcEryx9q1vkYi/6G5YdFpqhznemaqTSBZ lqpsFKjUy4S0B6MMWpyd3EBXgz8j+BQa2xLEl1o= X-Google-Smtp-Source: AGHT+IFH3uNRR0Fk5hEaH9HH4V9PbluE+Vh1y47i3AQVEyQ5BFMMyuL/U4aDPjY0JzFDFs4PGTvgk9KtVQgUAh7w9Ys= X-Received: by 2002:a17:907:9143:b0:a28:fb5:4389 with SMTP id l3-20020a170907914300b00a280fb54389mr1161220ejs.0.1704251521670; Tue, 02 Jan 2024 19:12:01 -0800 (PST) MIME-Version: 1.0 References: <20231229042114.1419-1-cooper.joshua@linux.alibaba.com> <20240102123943.1525-1-cooper.joshua@linux.alibaba.com> In-Reply-To: <20240102123943.1525-1-cooper.joshua@linux.alibaba.com> From: Kito Cheng Date: Wed, 3 Jan 2024 11:11:49 +0800 Message-ID: Subject: Re: [PATCH v4] RISC-V: Handle differences between XTheadvector and Vector To: "Jun Sha (Joshua)" Cc: gcc-patches@gcc.gnu.org, jim.wilson.gcc@gmail.com, palmer@dabbelt.com, andrew@sifive.com, philipp.tomsich@vrull.eu, jeffreyalaw@gmail.com, christoph.muellner@vrull.eu, juzhe.zhong@rivai.ai, Jin Ma , Xianmiao Qu Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > diff --git a/gcc/config/riscv/riscv_th_vector.h b/gcc/config/riscv/riscv_th_vector.h > new file mode 100644 > index 00000000000..6f47e0c90a4 > --- /dev/null > +++ b/gcc/config/riscv/riscv_th_vector.h > @@ -0,0 +1,49 @@ > +/* RISC-V 'XTheadVector' Extension intrinsics include file. > + Copyright (C) 2022-2023 Free Software Foundation, Inc. > + > + This file is part of GCC. > + > + GCC is free software; you can redistribute it and/or modify it > + under the terms of the GNU General Public License as published > + by the Free Software Foundation; either version 3, or (at your > + option) any later version. > + > + GCC is distributed in the hope that it will be useful, but WITHOUT > + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY > + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public > + License for more details. > + > + Under Section 7 of GPL version 3, you are granted additional > + permissions described in the GCC Runtime Library Exception, version > + 3.1, as published by the Free Software Foundation. > + > + You should have received a copy of the GNU General Public License and > + a copy of the GCC Runtime Library Exception along with this program; > + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see > + . */ > + > +#ifndef __RISCV_TH_VECTOR_H > +#define __RISCV_TH_VECTOR_H > + > +#include > +#include > + > +#ifndef __riscv_xtheadvector > +#error "XTheadVector intrinsics require the xtheadvector extension." > +#else > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/* NOTE: This implementation of riscv_th_vector.h is intentionally short. It does > + not define the RVV types and intrinsic functions directly in C and C++ > + code, but instead uses the following pragma to tell GCC to insert the > + necessary type and function definitions itself. The net effect is the > + same, and the file is a complete implementation of riscv_th_vector.h. */ > +#pragma riscv intrinsic "vector" #pragma riscv intrinsic "theadvector" Don't reuse `#pragma riscv intrinsic "vector"` to prevent including riscv_vector.h work with __riscv_xtheadvector. I know we already guarded with ifndef __riscv_xtheadvector and ifndef __riscv_vector for now, but we eventually will remove that due to multi-version function support. e.g. a.c compile with -march=rv64gc a.c: #include void foo(){ ... } void foo_vector () __attribute__(("arch=+v")); void foo_vector () { // Use vector intrinsic to implement something }