From: Kito Cheng <kito.cheng@gmail.com>
To: shihua@iscas.ac.cn
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
ben.marshall@pqshield.com,
Christoph Muellner <cmuellner@ventanamicro.com>,
Andrew Waterman <andrew@sifive.com>, jiawei <jiawei@iscas.ac.cn>,
mjos@iki.fi, Kito Cheng <kito.cheng@sifive.com>
Subject: Re: [PATCH 3/5 V1] RISC-V:Implement intrinsics for Crypto extension
Date: Mon, 28 Feb 2022 23:34:10 +0800 [thread overview]
Message-ID: <CA+yXCZCRd6c5aSaDdaetXrQJNGAKvVB9EaAznfBbN0T8Zu1zMg@mail.gmail.com> (raw)
In-Reply-To: <20220223094418.3518-4-shihua@iscas.ac.cn>
Those header files have license issues that should relicinced to GPL,
and don't put rvk_asm_intrin.h rvk_emu_intrin.h, since they are not
too meaningful when we have compiler support.
General comment:
- Use /* */ rather than //, that gives much more compatibility, that
is illegal for c89.
- Add a new line at the end of file, that prevents something like "\
No newline at end of file" in the diff.
> --- /dev/null
> +++ b/gcc/config/riscv/riscv_crypto_scalar.h
> @@ -0,0 +1,247 @@
> +// riscv_crypto_scalar.h
> +// 2021-11-08 Markku-Juhani O. Saarinen <mjos@pqshield.com>
> +// Copyright (c) 2021, PQShield Ltd. All rights reserved.
> +
> +// === Scalar crypto: General mapping from intrinsics to compiler builtins,
> +// inline assembler, or to an (insecure) porting / emulation layer.
> +
> +/*
> + * _rv_*(...)
> + * RV32/64 intrinsics that return the "long" data type
> + *
> + * _rv32_*(...)
> + * RV32/64 intrinsics that return the "int32_t" data type
> + *
> + * _rv64_*(...)
> + * RV64-only intrinsics that return the "int64_t" data type
> + *
> + */
> +
> +#ifndef _RISCV_CRYPTO_SCALAR_H
> +#define _RISCV_CRYPTO_SCALAR_H
> +
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +#if !defined(__riscv_xlen) && !defined(RVKINTRIN_EMULATE)
> +#warning "Target is not RISC-V. Enabling insecure emulation."
> +#define RVKINTRIN_EMULATE 1
> +#endif
> +
> +#if defined(RVKINTRIN_EMULATE)
> +
> +// intrinsics via emulation (insecure -- porting / debug option)
> +#include "rvk_emu_intrin.h"
> +#define _RVK_INTRIN_IMPL(s) _rvk_emu_##s
> +
> +#elif defined(RVKINTRIN_ASSEMBLER)
> +
> +// intrinsics via inline assembler (builtins not available)
> +#include "rvk_asm_intrin.h"
> +#define _RVK_INTRIN_IMPL(s) _rvk_asm_##s
> +#else
> +
> +// intrinsics via compiler builtins
> +#include <stdint.h>
> +#define _RVK_INTRIN_IMPL(s) __builtin_riscv_##s
> +
> +#endif
Drop rvk_emu_intrin.h and rvk_asm_intrin.h here.
> +
> +// set type if not already set
> +#if !defined(RVKINTRIN_RV32) && !defined(RVKINTRIN_RV64)
...
> +static inline long _rv_sm3p0(long rs1)
> + { return _RVK_INTRIN_IMPL(sm3p0)(rs1); } // SM3P0
> +
> +static inline long _rv_sm3p1(long rs1)
> + { return _RVK_INTRIN_IMPL(sm3p1)(rs1); } // SM3P1
> +
> +#ifdef __cplusplus
> +}
> +#endif
> +
#undef _RVK_INTRIN_IMPL before end of this header to prevent
introducing unexpected symbols.
> +#endif // _RISCV_CRYPTO_SCALAR_H
> \ No newline at end of file
next prev parent reply other threads:[~2022-02-28 15:34 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-23 9:44 [PATCH 0/5 V1] RISC-V:Implement Crypto extension's instruction patterns and it's intrinsics shihua
2022-02-23 9:44 ` [PATCH 1/5 V1] RISC-V:Implement instruction patterns for Crypto extension shihua
2022-02-28 16:04 ` Kito Cheng
2022-02-23 9:44 ` [PATCH 2/5 V1] RISC-V:Implement built-in instructions " shihua
2022-02-23 9:44 ` [PATCH 3/5 V1] RISC-V:Implement intrinsics " shihua
2022-02-28 15:34 ` Kito Cheng [this message]
2022-02-23 9:44 ` [PATCH 4/5 V1] RISC-V:Implement testcases " shihua
2022-03-01 13:00 ` Kito Cheng
2022-03-01 13:49 ` Kito Cheng
2022-02-23 9:44 ` [PATCH 5/5 V1] RISC-V:Implement architecture extension test macros " shihua
2022-02-24 9:55 ` Kito Cheng
2022-02-28 15:56 ` Kito Cheng
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