From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vs1-xe31.google.com (mail-vs1-xe31.google.com [IPv6:2607:f8b0:4864:20::e31]) by sourceware.org (Postfix) with ESMTPS id 692273857365 for ; Mon, 19 Dec 2022 15:14:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 692273857365 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-vs1-xe31.google.com with SMTP id d185so9031380vsd.0 for ; Mon, 19 Dec 2022 07:14:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=TQnPC48SUKR2Mgy3Gre8BKbffpMBx1NQYU3nQxCWM5E=; b=kzSkhcG8Wel6uA62E3m+fcpWXBK6vt36PsekqERKGCFjVp4e4sHZ6pX42XLu72ySIj 57FrTJGOIJl1hkPLa4WOq6nXf2AQWqFVHnzRZMlMAjPwLrz58HSU9MNTCH7RnDUHe3sx ZbSh2oa29Cea6lxTiYcDBPEO53Qv210C8mejlFsRpuIVAsiG0C9HCdWweGIh0bfV3dSX brSvy7RNFzhfkgMEaukfTS5lalVBY0mifgtDvt2m9OthXxYPawgujc70hc2U8hhTKfrQ VwPciqx6ZCiyMUsRYul+bI1EHD2Uc1B4tBHKKPSWUYVakKaZ6m/WkZ8EtPLscqkGhqed vTvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=TQnPC48SUKR2Mgy3Gre8BKbffpMBx1NQYU3nQxCWM5E=; b=lP1y19OIpqdXVaH61lAWt6Ifujc56ywOizB7nqowAYyzQ+n9hTn6+fHd3M31N4PY9k CUJ2JawhB0u5r+gRD0lid/Wa4z8qytN7ju3BeZXKh22X0F4rxEfc7S+lVpcsqR6l04EL +91FNmjctbxJt0c4GLGBPZdLErhJGGFz26IgXGV1rKGlDftioDGIxRYO1LjT30lrGb8w Q3wJ0gYkySE6PsbqFu7OFwYDr5vATw+KmoutwnnygLw4dknOYtGcDAMalB9nqUXMct3o ayyo9k/7mvVhpAA1WACRm45Swi0ucfsvtC8fw7xoMEf7pKmW8vFtFsK3tMoL8VFFqtdf JSmQ== X-Gm-Message-State: ANoB5pnRbVk0Xc+mb0edlyPZj4ad0TPteYsbT9rP+Ckili6BB4qvAUDU GseSTUbapjYLcmgHujXKHrUgPogiGh01z9keCUE= X-Google-Smtp-Source: AA0mqf5iu7wWegSy/getbAR/5MuxqHl/gHzoywNv/gAqoSy+ig3ZuyQA7fwLPb48+Dggdhh1QjGo8o8Zb2P+r9SQ0D8= X-Received: by 2002:a67:f2c4:0:b0:3b0:f932:5a40 with SMTP id a4-20020a67f2c4000000b003b0f9325a40mr21721411vsn.30.1671462872334; Mon, 19 Dec 2022 07:14:32 -0800 (PST) MIME-Version: 1.0 References: <20221219111147.1768-1-juzhe.zhong@rivai.ai> In-Reply-To: <20221219111147.1768-1-juzhe.zhong@rivai.ai> From: Kito Cheng Date: Mon, 19 Dec 2022 23:14:18 +0800 Message-ID: Subject: Re: [PATCH] RISC-V: Simplify ASM checks. To: =?UTF-8?B?6ZKf5bGF5ZOy?= Cc: GCC Patches Content-Type: multipart/alternative; boundary="000000000000c2c91e05f02fc6d3" X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,HTML_MESSAGE,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --000000000000c2c91e05f02fc6d3 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Merged into previou patch and commited =E6=96=BC 2022=E5=B9=B412=E6=9C=8819=E6=97=A5 =E9=80= =B1=E4=B8=80 19:11 =E5=AF=AB=E9=81=93=EF=BC=9A > From: Ju-Zhe Zhong > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: Simplify ASM checks. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c: Ditto. > * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c: Ditto. > > --- > .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-10.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-11.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-12.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-13.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-14.c | 16 +++++----- > .../riscv/rvv/vsetvl/vlmax_phi-15.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-16.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-17.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-18.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-19.c | 4 +-- > .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-20.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-21.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-22.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-23.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-24.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-25.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-26.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-27.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_phi-28.c | 16 +++++----- > .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c | 4 +-- > .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c | 4 +-- > .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c | 4 +-- > .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c | 4 +-- > .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c | 4 +-- > .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c | 4 +-- > .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_single_block-1.c | 14 ++++----- > .../riscv/rvv/vsetvl/vlmax_single_block-10.c | 24 +++++++-------- > .../riscv/rvv/vsetvl/vlmax_single_block-11.c | 6 ++-- > .../riscv/rvv/vsetvl/vlmax_single_block-12.c | 18 +++++------ > .../riscv/rvv/vsetvl/vlmax_single_block-13.c | 14 ++++----- > .../riscv/rvv/vsetvl/vlmax_single_block-14.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_single_block-15.c | 6 ++-- > .../riscv/rvv/vsetvl/vlmax_single_block-16.c | 30 +++++++++---------- > .../riscv/rvv/vsetvl/vlmax_single_block-17.c | 18 +++++------ > .../riscv/rvv/vsetvl/vlmax_single_block-18.c | 6 ++-- > .../riscv/rvv/vsetvl/vlmax_single_block-19.c | 12 ++++---- > .../riscv/rvv/vsetvl/vlmax_single_block-2.c | 6 ++-- > .../riscv/rvv/vsetvl/vlmax_single_block-3.c | 6 ++-- > .../riscv/rvv/vsetvl/vlmax_single_block-4.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_single_block-5.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_single_block-6.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_single_block-7.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_single_block-8.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_single_block-9.c | 30 +++++++++---------- > .../riscv/rvv/vsetvl/vlmax_single_vtype-1.c | 28 ++++++++--------- > .../riscv/rvv/vsetvl/vlmax_single_vtype-2.c | 12 ++++---- > .../riscv/rvv/vsetvl/vlmax_single_vtype-3.c | 6 ++-- > .../riscv/rvv/vsetvl/vlmax_single_vtype-4.c | 8 ++--- > .../riscv/rvv/vsetvl/vlmax_single_vtype-5.c | 8 ++--- > .../riscv/rvv/vsetvl/vlmax_single_vtype-6.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_single_vtype-7.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_single_vtype-8.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-1.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-10.c | 6 ++-- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-12.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-13.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-14.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-15.c | 8 ++--- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-16.c | 8 ++--- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-2.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-4.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-5.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-6.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-7.c | 2 +- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-8.c | 4 +-- > .../riscv/rvv/vsetvl/vlmax_switch_vtype-9.c | 4 +-- > 69 files changed, 234 insertions(+), 234 deletions(-) > > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c > index 1c32dc3f844..cd58e53a822 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,\.L[0-9]+\s*\.L[0-9]+\= :\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,\.L[0-9]+\s*\.L[0-9]+\= :\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c > index e0cee66c2d2..1aaebdf4bc4 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c > index 67867dbf4c4..813ea49e705 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= mf2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c > index 530604218da..9b59df9f78b 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= mf2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c > index 3c7951ab67e..35e4fd190af 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= mf2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c > index b44d28fd77a..2330d34246f 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c > @@ -207,11 +207,11 @@ void f7 (void * restrict in, void * restrict out, > int n, int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 1,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 8,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:= \s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9= ]|s10|s11|a[0-7])\)} > 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:= \s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c > index 06d3ffd0020..687ecdf0fa3 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c > index 141602b9239..d644fb69955 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c > index 345d799bc6c..ea4d95554bc 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c > index bce14e29791..cbbffb78966 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c > index a0e3b5703a7..21d5cc91310 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:= \s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:= \s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c > index 01b9a50389d..39d523b6676 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-op= ts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c > index c41022dce3a..29dd2d6a774 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:= \s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:= \s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c > index d90a06ce544..286a7439fb6 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:= \s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:= \s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c > index 6527a0a67dc..4cd8a5dfc79 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c > index dc09782eb2d..5825f12a577 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c > index f566156a05e..e2b53313ee1 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c > index 4f2ca827705..f40ff57f57f 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= mf2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c > index 9c0a07bc05d..26a9933e8e2 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= mf2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c > index 6d78052cc61..7028d9118bb 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c > @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= mf2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c > index cdd1d3a2e19..aa4c1a7f51d 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c > @@ -227,11 +227,11 @@ void f7 (void * restrict in, void * restrict out, > int n, int cond) > *(vbool1_t*)(out + i) =3D v; > } > } > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 1,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 8,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vlm\.v\s*(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9= ]|s10|s11|a[0-7])\)} > 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vlm\.v\s*(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c > index ddfc938bcc4..41585d012e1 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" > no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c > index a6cb700185f..d4890e31ff0 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-op= ts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c > index 1da94b4486d..53905fca6fe 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c > index 19d005f70ee..4d56ec53540 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-= 9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c > index 6eabe9cb0ff..f722ec49c02 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c > index 811f7b3f9a8..69bd0be5fd6 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf4,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c > index a91eca7f3dd..208173fb4bb 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c > @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n, > int cond) > } > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf2,\s*t[au],\s*m[au]} > 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > -/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0= -9]|s10|s11|a[0-7])\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:= \s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c > index 016af8fc67b..fb1258f826e 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c > @@ -145,10 +145,10 @@ void foo7 (void * restrict in, void * restrict out) > *(vbool1_t*)(out + 8) =3D v8; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c > index 185db998df1..bdfb964cc01 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c > @@ -123,21 +123,21 @@ void f15 (void * restrict in, void * restrict out) > *(vint8m4_t*)(out + 2) =3D v2; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > /* { dg-final { scan-assembler-times {vsetvli} 15 { target { no-opts > "-O0" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c > index 95746b763e0..17055f0f0bf 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c > @@ -27,8 +27,8 @@ void f3 (void * restrict in, void * restrict out) > *(vint64m1_t*)(out + 2) =3D v2; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" > } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c > index d3442457861..1383995ac72 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c > @@ -75,18 +75,18 @@ void f9 (void * restrict in, void * restrict out) > *(vfloat32m8_t*)(out + 2) =3D v2; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > /* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" > } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c > index 9ed1020af29..ba4b5ef7c3b 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c > @@ -75,15 +75,15 @@ void f9 (void * restrict in, void * restrict out) > *(vfloat32m8_t*)(out + 2) =3D v2; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > /* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" > } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c > index f5d91c68a16..5f04c192924 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c > @@ -11,6 +11,6 @@ void f3 (void * restrict in, void * restrict out) > *(vfloat64m1_t*)(out + 2) =3D v2; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" > } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c > index 3d9e8370cc9..8debc17248f 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c > @@ -35,8 +35,8 @@ void f4 (void * restrict in, void * restrict out) > *(vfloat64m1_t*)(out + 2) =3D v2; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m1,\s*t[au],\s*m[au]} > 2 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { > no-opts "-O0" } } } } */ > > /* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" > } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c > index 6ee416088ca..c8913d8267d 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c > @@ -123,25 +123,25 @@ void f15 (void * restrict in, void * restrict out) > *(vint16m8_t*)(out + 2) =3D v2; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*= m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*= m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" } } } } */ > > /* { dg-final { scan-assembler-times {vsetvli} 15 { target { no-opts > "-O0" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c > index 7fba5560f88..edb94218ede 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c > @@ -21,12 +21,12 @@ void foo7 (void * restrict in, void * restrict out) > *(vbool64_t*)(out + 7) =3D v7; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= 8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > -/* { dg-final { scan-assembler-times > {vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9= ]|s10|s11|a[0-7])\)} > 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > -/* { dg-final { scan-assembler-times > {vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9= ]|s10|s11|a[0-7])\)} > 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 7 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 7 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c > index 01ea59db736..e547b94621b 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c > @@ -26,7 +26,7 @@ void f (void * restrict in, void * restrict out) > *(vint8mf2_t*)(out + 7) =3D v7; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m= f2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ > /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" > no-opts "-O1" no-opts "-Os" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c > index 431ec82846b..819e58281fe 100644 > --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c > @@ -81,25 +81,25 @@ void f (void * restrict in, void * restrict out) > *(vint16m8_t*)(out + 30) =3D v30; > } > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } }= } > } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ > /* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ > /* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } }= } > } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ > /* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ > /* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } }= } > } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ > /* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ > /* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ > > -/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*= m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } }= } > } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ > /* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */< --000000000000c2c91e05f02fc6d3--