From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by sourceware.org (Postfix) with ESMTPS id C08E53861038 for ; Mon, 19 Feb 2024 08:11:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C08E53861038 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org C08E53861038 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::52a ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1708330301; cv=none; b=tVnammvnWM4XTQfQj/BJY056rkBXxUKMJLYYB2T0djhUV3nS+aUYW10m+rme9DmXuEa/Ez8vBXRX3cCYhRFIdYKspoI3yrUAKgjGs7AjY4OMxXBY9miRyYoyxVe6WQbijajEEi9/6Fy7rsAslvYuhnMXPI/knvcuSYsu98me8kA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1708330301; c=relaxed/simple; bh=Le5RzmcM69Urk9w3KYP2GIFL79Z/vX6zIKpHh1BSyTE=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=Sc22bkH0YRlzxp0D5XhqLZcq7KasWFwIfzBxJUiFpLdERZMSs+3mGTMEQxN9Ize0YwkkVILcjYBBApHdd4RU1OKS95vGaR3J710ElAufIK4iRlFc++/OBoZQ+b2Q4xVZ+JzCLWEf+zcxQyEjB4DVzJqNn6fXzx9rMp05QxneXUc= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-5640fef9fa6so2816757a12.0 for ; Mon, 19 Feb 2024 00:11:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708330296; x=1708935096; darn=gcc.gnu.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=UcEuRaYi9s9aoUMtEal+fEcoT536vwo8V4U8UuUOsZc=; b=GvYzoEr008/6VGiljfB0mE/I19K6L0iL6JhD+4PNaBo91HlhLfFErb1EI+N1UjzsDX Sbf2hUXOJ1mUbc4jtMcsou9sCK4xJlykqtSB29s0V32J7E4N+GfFUAgk9BWr1uE+S03u MU3d+PvbvGklPld8R19YPJOIXkkgu5nF2DQ578pjSelLdtpcEir8c5mBhgUszLm1onBm yEiMAP0qozihmf6z4dx019vlsCUfM1fm6vmPp0MbN7VQV8Wlx4SGhIgeHQuurQMCOTMd FaeZXqGuDWro113cV++yebninHsova+JGqPmUG10v6F/27eTQiDQltkHV3f6Gf+61sfW EhZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708330296; x=1708935096; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UcEuRaYi9s9aoUMtEal+fEcoT536vwo8V4U8UuUOsZc=; b=RQkmpj9OYhPLe04jcjRhAaQhfPvurQdBEtyF7X6E/+guzRCCtzFg3cUbQcYzhYVY/R Av9xWC/czNiIJLPT5Fl1C1Ia0peELPufIe8gjrRhNQTKUxYJPwYQ2w96GcOe9oO9dOUI Lh+LjPuXAgDHRDgEFg+2jUNHl7NEnFGEDlIRCDBbwguOJ5h8mV7Reih2jXhUITGH2c6y 0jH6eP9p59ESCvYMDLG/s1yEu8eod8/VrJSRNDrDEoXUi2/rQGkHUjLiphthhR8Mcn2p nlgOhEe0F0TxeoP+PUbQUTzYrLxWWNgTSwkmegE3RaKr88dJSKmm1vvhl/rvpplxPCY5 rNxQ== X-Gm-Message-State: AOJu0YwBwsFyU4T6lziMRbnKRdxdsB9noOKusyyVyXthSbhXKhd4PhSI HFBcKO2LXUR5mXZHbj3+C3q3IxopKnRFtX5mNdq3oKtyDCIYxRg0Ix/Is+KSjfoc9vlOWSJcimJ d98ZoHtyAv4iwuUAUkPFGWNL1km0= X-Google-Smtp-Source: AGHT+IEDMk0kSetgmB66RiQDdf5KgtL5y82JtLuuNykhfXQRFJhWwFQtpp7sF5ohAGlPfjKZKtj0Dq5z8akcnGm1fHA= X-Received: by 2002:a17:906:3c50:b0:a3e:550d:71d0 with SMTP id i16-20020a1709063c5000b00a3e550d71d0mr3972561ejg.73.1708330295938; Mon, 19 Feb 2024 00:11:35 -0800 (PST) MIME-Version: 1.0 References: <20240201090252.24414-1-juzhe.zhong@rivai.ai> <8ED67FCA98F12278+202402191542116004470@rivai.ai> In-Reply-To: <8ED67FCA98F12278+202402191542116004470@rivai.ai> From: Kito Cheng Date: Mon, 19 Feb 2024 16:11:24 +0800 Message-ID: Subject: Re: [PATCH v2] RISC-V: Suppress the vsetvl fusion for conflict successors To: "juzhe.zhong@rivai.ai" Cc: gcc-patches , "Kito.cheng" , jeffreyalaw , Robin Dapp Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,LIKELY_SPAM_BODY,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: LGTM On Mon, Feb 19, 2024 at 3:42=E2=80=AFPM juzhe.zhong@rivai.ai wrote: > > Ping this patch which is simple fix on VSETVL PASS. > Ok for trunk ? > > ________________________________ > juzhe.zhong@rivai.ai > > > From: Juzhe-Zhong > Date: 2024-02-01 17:02 > To: gcc-patches > CC: kito.cheng; kito.cheng; jeffreyalaw; rdapp.gcc; Juzhe-Zhong > Subject: [PATCH v2] RISC-V: Suppress the vsetvl fusion for conflict succe= ssors > Update in v2: Add dump information. > > This patch fixes the following ineffective vsetvl insertion: > > #include "riscv_vector.h" > > void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t c= ond, size_t cond2) > { > for (size_t i =3D 0; i < n; i++) > { > if (i =3D=3D cond) { > vint8mf8_t v =3D *(vint8mf8_t*)(in + i + 100); > *(vint8mf8_t*)(out + i + 100) =3D v; > } else if (i =3D=3D cond2) { > vfloat32mf2_t v =3D *(vfloat32mf2_t*)(in + i + 200); > *(vfloat32mf2_t*)(out + i + 200) =3D v; > } else if (i =3D=3D (cond2 - 1)) { > vuint16mf2_t v =3D *(vuint16mf2_t*)(in + i + 300); > *(vuint16mf2_t*)(out + i + 300) =3D v; > } else { > vint8mf4_t v =3D *(vint8mf4_t*)(in + i + 400); > *(vint8mf4_t*)(out + i + 400) =3D v; > } > } > } > > Before this patch: > > f: > .LFB0: > .cfi_startproc > beq a2,zero,.L12 > addi a7,a0,400 > addi a6,a1,400 > addi a0,a0,1600 > addi a1,a1,1600 > li a5,0 > addi t6,a4,-1 > vsetvli t3,zero,e8,mf8,ta,ma ---> ineffective uplift > .L7: > beq a3,a5,.L15 > beq a4,a5,.L16 > beq t6,a5,.L17 > vsetvli t1,zero,e8,mf4,ta,ma > vle8.v v1,0(a0) > vse8.v v1,0(a1) > vsetvli t3,zero,e8,mf8,ta,ma > .L4: > addi a5,a5,1 > addi a7,a7,4 > addi a6,a6,4 > addi a0,a0,4 > addi a1,a1,4 > bne a2,a5,.L7 > .L12: > ret > .L15: > vle8.v v1,0(a7) > vse8.v v1,0(a6) > j .L4 > .L17: > vsetvli t1,zero,e8,mf4,ta,ma > addi t5,a0,-400 > addi t4,a1,-400 > vle16.v v1,0(t5) > vse16.v v1,0(t4) > vsetvli t3,zero,e8,mf8,ta,ma > j .L4 > .L16: > addi t5,a0,-800 > addi t4,a1,-800 > vle32.v v1,0(t5) > vse32.v v1,0(t4) > j .L4 > > It's obvious that we are hoisting the e8mf8 vsetvl to the top. It's ineff= ective since e8mf8 comes from > low probability block which is if (i =3D=3D cond). > > For this case, we disable such fusion. > > After this patch: > > f: > beq a2,zero,.L12 > addi a7,a0,400 > addi a6,a1,400 > addi a0,a0,1600 > addi a1,a1,1600 > li a5,0 > addi t6,a4,-1 > .L7: > beq a3,a5,.L15 > beq a4,a5,.L16 > beq t6,a5,.L17 > vsetvli t1,zero,e8,mf4,ta,ma > vle8.v v1,0(a0) > vse8.v v1,0(a1) > .L4: > addi a5,a5,1 > addi a7,a7,4 > addi a6,a6,4 > addi a0,a0,4 > addi a1,a1,4 > bne a2,a5,.L7 > .L12: > ret > .L15: > vsetvli t3,zero,e8,mf8,ta,ma > vle8.v v1,0(a7) > vse8.v v1,0(a6) > j .L4 > .L17: > addi t5,a0,-400 > addi t4,a1,-400 > vsetvli t1,zero,e8,mf4,ta,ma > vle16.v v1,0(t5) > vse16.v v1,0(t4) > j .L4 > .L16: > addi t5,a0,-800 > addi t4,a1,-800 > vsetvli t3,zero,e32,mf2,ta,ma > vle32.v v1,0(t5) > vse32.v v1,0(t4) > j .L4 > > Tested on both RV32/RV64 no regression. Ok for trunk ? > > PR target/113696 > > gcc/ChangeLog: > > * config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info): S= uppress vsetvl fusion. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/vsetvl/pr113696.c: New test. > > --- > gcc/config/riscv/riscv-vsetvl.cc | 25 ++++++++++++++++++ > .../gcc.target/riscv/rvv/vsetvl/pr113696.c | 26 +++++++++++++++++++ > 2 files changed, 51 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113696.c > > diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vs= etvl.cc > index cec862329c5..28b7534d970 100644 > --- a/gcc/config/riscv/riscv-vsetvl.cc > +++ b/gcc/config/riscv/riscv-vsetvl.cc > @@ -2959,6 +2959,31 @@ pre_vsetvl::earliest_fuse_vsetvl_info (int iter) > src_block_info.set_empty_info (); > src_block_info.probability > =3D profile_probability::uninitialized (); > + /* See PR113696, we should reset immediate dominator to > + empty since we may uplift ineffective vsetvl which > + locate at low probability block. */ > + basic_block dom > + =3D get_immediate_dominator (CDI_DOMINATORS, eg->src); > + auto &dom_block_info =3D get_block_info (dom); > + if (dom_block_info.has_info () > + && !m_dem.compatible_p ( > + dom_block_info.get_exit_info (), curr_info)) > + { > + dom_block_info.set_empty_info (); > + dom_block_info.probability > + =3D profile_probability::uninitialized (); > + if (dump_file && (dump_flags & TDF_DETAILS)) > + { > + fprintf (dump_file, > + " Reset dominator bb %u:", > + dom->index); > + prev_info.dump (dump_file, " "); > + fprintf (dump_file, > + " due to (same probability or no " > + "compatible reaching):"); > + curr_info.dump (dump_file, " "); > + } > + } > changed =3D true; > } > /* Choose the one with higher probability. */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113696.c b/gcc/t= estsuite/gcc.target/riscv/rvv/vsetvl/pr113696.c > new file mode 100644 > index 00000000000..5d7c5f52ead > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113696.c > @@ -0,0 +1,26 @@ > +/* { dg-do compile } */ > +/* { dg-options "--param=3Driscv-autovec-preference=3Dscalable -march=3D= rv64gcv -mabi=3Dlp64d -O3" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t = cond, size_t cond2) > +{ > + for (size_t i =3D 0; i < n; i++) > + { > + if (i =3D=3D cond) { > + vint8mf8_t v =3D *(vint8mf8_t*)(in + i + 100); > + *(vint8mf8_t*)(out + i + 100) =3D v; > + } else if (i =3D=3D cond2) { > + vfloat32mf2_t v =3D *(vfloat32mf2_t*)(in + i + 200); > + *(vfloat32mf2_t*)(out + i + 200) =3D v; > + } else if (i =3D=3D (cond2 - 1)) { > + vuint16mf2_t v =3D *(vuint16mf2_t*)(in + i + 300); > + *(vuint16mf2_t*)(out + i + 300) =3D v; > + } else { > + vint8mf4_t v =3D *(vint8mf4_t*)(in + i + 400); > + *(vint8mf4_t*)(out + i + 400) =3D v; > + } > + } > +} > + > +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0= " no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } = } */ > -- > 2.36.1 >