From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ua1-x931.google.com (mail-ua1-x931.google.com [IPv6:2607:f8b0:4864:20::931]) by sourceware.org (Postfix) with ESMTPS id 9D981396E833 for ; Thu, 17 Nov 2022 00:37:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9D981396E833 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ua1-x931.google.com with SMTP id 97so65160uam.0 for ; Wed, 16 Nov 2022 16:37:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=tTZ2RaXwqc1KDNZITdg8L9P4GmJW109LELT4btVGlrw=; b=DD+DnIMSqPS0iq0YaHjfIOhCRzU5jxYP1TMYLBf6OpF4z6oIwbffhsGeE32Hwb8eWD RibUFRa9o0arsrAc5Hx7IS6knARiyQT8RiOFg7PHZfEzodBdz8GLwdJEo1lWoXckTQl9 UapgTzMsy595N3lS0pGPPabsO2aCyv6VF3PHUoKnEbXafh0t/Rambw9Hee8bTWPr9xvk BWfdzw7zS44tuOL2nlRbPNRQcFkKy+0jy8FXyq6hCq0LBKdKl397FC47Hlwl5Dr46WYb ZynAYSgzPtbIbWnoYd3cy87FU8/zMoZNx7tFPWgWyzz60ZvJkdhUbwfVGTgQutIpjQ78 zfRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=tTZ2RaXwqc1KDNZITdg8L9P4GmJW109LELT4btVGlrw=; b=Iq8uqYSi15a85kGR7rh37u/fQktrqz+WYXcS6cOiKzIChfpRlWUwovSZyADDZWotwG 4brMBiOtniRkcBxZSq4CPz/XolBVK7Ocp6mGhdfKlyt28B92fxRV9o8lxsvVAH0YPKV4 Wt4SUzlR6zLQHNMh6fCdouTgWjjMZAJ59jnYxyfp1bkH716o+ITznfzMR9E9nX/tBnMD dqOMWESN3YD0GEgbt58+xS+qUjFVTpdyQAHWzpmpwgV9a1zv8voayl6ssMp2NHJTBv2X Jwmgjx9AwsWY7VM461M25QVvxiQPXq/rAvyVWSYMgfbF/WOuNOE6BV5O71L2rnuVdGza AYbQ== X-Gm-Message-State: ANoB5pl/ZGQZ4zNpV+PL1JcOENlwd1bAFzI2HSUTC4J3cDhOnelnbC9U zFXzuVJvsp8P62X1mS9TV/Nxz5isa6bglDIPQ3c= X-Google-Smtp-Source: AA0mqf4LBSFZkFh+En7qHoz39oYsJmhG9TWSiEZnvJotmk4hgNPOxzoZ+8Si4EEaiKtEf2ZY9mgnkgx8tjXvDQNdUCY= X-Received: by 2002:ab0:3387:0:b0:414:4f1e:6a8c with SMTP id y7-20020ab03387000000b004144f1e6a8cmr14393945uap.119.1668645427733; Wed, 16 Nov 2022 16:37:07 -0800 (PST) MIME-Version: 1.0 References: <20221116211614.904834-1-kevinl@rivosinc.com> In-Reply-To: <20221116211614.904834-1-kevinl@rivosinc.com> From: Kito Cheng Date: Thu, 17 Nov 2022 08:36:56 +0800 Message-ID: Subject: Re: [PATCH v3] RISC-V missing __builtin_lceil and __builtin_lfloor To: Kevin Lee Cc: gcc-patches@gcc.gnu.org, gnu-toolchain@rivosinc.com, palmer@dabbelt.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: LGTM, thanks :) On Thu, Nov 17, 2022 at 5:17 AM Kevin Lee wrote: > > l insn condition has been modified based on the thread in > https://gcc.gnu.org/pipermail/gcc-patches/2022-November/605481.html. The > lfloor-lecil-inexact checks call instead of scan-assembler-not > "fcvt.l.s/d" due to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107723. > > Is this patch good for commit? > > gcc/ChangeLog: > > Michael Collison > Kevin Lee > * config/riscv/iterators.md (RINT): Additional iterators. > (rint_pattern): Additional attributes. > (rint_rm): Ditto. > * config/riscv/riscv.md (UNSPEC_LCEIL): New unspec. > (UNSPEC_LFLOOR): Ditto. > (l2): Additional conditions. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/lfloor-lceil-inexact.c: New test. > * gcc.target/riscv/lfloor-lceil.c: New test. > --- > gcc/config/riscv/iterators.md | 10 ++- > gcc/config/riscv/riscv.md | 8 +- > .../gcc.target/riscv/lfloor-lceil-inexact.c | 78 ++++++++++++++++++ > gcc/testsuite/gcc.target/riscv/lfloor-lceil.c | 79 +++++++++++++++++++ > 4 files changed, 171 insertions(+), 4 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/lfloor-lceil-inexact.c > create mode 100644 gcc/testsuite/gcc.target/riscv/lfloor-lceil.c > > diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md > index 50380ecfac9..c5adcb08421 100644 > --- a/gcc/config/riscv/iterators.md > +++ b/gcc/config/riscv/iterators.md > @@ -233,9 +233,13 @@ (define_code_attr bitmanip_insn [(smin "min") > ;; ------------------------------------------------------------------- > > ;; Iterator and attributes for floating-point rounding instructions. > -(define_int_iterator RINT [UNSPEC_LRINT UNSPEC_LROUND]) > -(define_int_attr rint_pattern [(UNSPEC_LRINT "rint") (UNSPEC_LROUND "round")]) > -(define_int_attr rint_rm [(UNSPEC_LRINT "dyn") (UNSPEC_LROUND "rmm")]) > +(define_int_iterator RINT [UNSPEC_LRINT UNSPEC_LROUND UNSPEC_LCEIL UNSPEC_LFLOOR]) > +(define_int_attr rint_pattern [(UNSPEC_LRINT "rint") (UNSPEC_LROUND "round") > + (UNSPEC_LCEIL "ceil") (UNSPEC_LFLOOR "floor")]) > +(define_int_attr rint_rm [(UNSPEC_LRINT "dyn") (UNSPEC_LROUND "rmm") > + (UNSPEC_LCEIL "rup") (UNSPEC_LFLOOR "rdn")]) > +(define_int_attr rint_allow_inexact [(UNSPEC_LRINT "1") (UNSPEC_LROUND "0") > + (UNSPEC_LCEIL "0") (UNSPEC_LFLOOR "0")]) > > ;; Iterator and attributes for quiet comparisons. > (define_int_iterator QUIET_COMPARISON [UNSPEC_FLT_QUIET UNSPEC_FLE_QUIET]) > diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md > index 798f7370a08..57777074f8e 100644 > --- a/gcc/config/riscv/riscv.md > +++ b/gcc/config/riscv/riscv.md > @@ -60,6 +60,9 @@ (define_c_enum "unspec" [ > UNSPEC_FMIN > UNSPEC_FMAX > > + UNSPEC_LCEIL > + UNSPEC_LFLOOR > + > ;; Stack tie > UNSPEC_TIE > ]) > @@ -1552,7 +1555,10 @@ (define_insn "l2" > (unspec:GPR > [(match_operand:ANYF 1 "register_operand" " f")] > RINT))] > - "TARGET_HARD_FLOAT || TARGET_ZFINX" > + "(TARGET_HARD_FLOAT || TARGET_ZFINX) && > + ( > + || flag_fp_int_builtin_inexact > + || !flag_trapping_math)" > "fcvt.. %0,%1," > [(set_attr "type" "fcvt") > (set_attr "mode" "")]) > diff --git a/gcc/testsuite/gcc.target/riscv/lfloor-lceil-inexact.c b/gcc/testsuite/gcc.target/riscv/lfloor-lceil-inexact.c > new file mode 100644 > index 00000000000..3b37df20d0e > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/lfloor-lceil-inexact.c > @@ -0,0 +1,78 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv64gc -mabi=lp64d -fno-fp-int-builtin-inexact" } */ > +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ > + > +int > +ceil1(float i) > +{ > + return __builtin_lceil(i); > +} > + > +long > +ceil2(float i) > +{ > + return __builtin_lceil(i); > +} > + > +long long > +ceil3(float i) > +{ > + return __builtin_lceil(i); > +} > + > +int > +ceil4(double i) > +{ > + return __builtin_lceil(i); > +} > + > +long > +ceil5(double i) > +{ > + return __builtin_lceil(i); > +} > + > +long long > +ceil6(double i) > +{ > + return __builtin_lceil(i); > +} > + > +int > +floor1(float i) > +{ > + return __builtin_lfloor(i); > +} > + > +long > +floor2(float i) > +{ > + return __builtin_lfloor(i); > +} > + > +long long > +floor3(float i) > +{ > + return __builtin_lfloor(i); > +} > + > +int > +floor4(double i) > +{ > + return __builtin_lfloor(i); > +} > + > +long > +floor5(double i) > +{ > + return __builtin_lfloor(i); > +} > + > +long long > +floor6(double i) > +{ > + return __builtin_lfloor(i); > +} > + > +/* { dg-final { scan-assembler-times "call" 12 } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c b/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c > new file mode 100644 > index 00000000000..4715de746fb > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c > @@ -0,0 +1,79 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv64gc -mabi=lp64d" } */ > +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ > + > +int > +ceil1(float i) > +{ > + return __builtin_lceil(i); > +} > + > +long > +ceil2(float i) > +{ > + return __builtin_lceil(i); > +} > + > +long long > +ceil3(float i) > +{ > + return __builtin_lceil(i); > +} > + > +int > +ceil4(double i) > +{ > + return __builtin_lceil(i); > +} > + > +long > +ceil5(double i) > +{ > + return __builtin_lceil(i); > +} > + > +long long > +ceil6(double i) > +{ > + return __builtin_lceil(i); > +} > + > +int > +floor1(float i) > +{ > + return __builtin_lfloor(i); > +} > + > +long > +floor2(float i) > +{ > + return __builtin_lfloor(i); > +} > + > +long long > +floor3(float i) > +{ > + return __builtin_lfloor(i); > +} > + > +int > +floor4(double i) > +{ > + return __builtin_lfloor(i); > +} > + > +long > +floor5(double i) > +{ > + return __builtin_lfloor(i); > +} > + > +long long > +floor6(double i) > +{ > + return __builtin_lfloor(i); > +} > + > +/* { dg-final { scan-assembler-times "fcvt.l.s" 6 } } */ > +/* { dg-final { scan-assembler-times "fcvt.l.d" 6 } } */ > +/* { dg-final { scan-assembler-not "call" } } */ > -- > 2.25.1 >