Re: [V2 PATCH] RISC-V:Add '-m[no]-csr-check' option in gcc.

[Kito Cheng <kito.cheng@gmail.com>]

Committed, but I decided to take v1 and disable that by default to
prevent breaking the existing code :)

On Tue, Sep 13, 2022 at 5:37 PM jiawei <jiawei@iscas.ac.cn> wrote:
>
> From: Jiawei <jiawei@iscas.ac.cn>
>
> Add -m[no]-csr-check option in gcc part, when enable -mcsr-check option,
> it will add csr-check in .option section and pass this to assembler.
>
> V2: Add assembler support check info for -mcsr-check. Thanks for Kito's
> suggestions.
>
> gcc/ChangeLog:
>
>         * config.in: New def.
>         * config/riscv/riscv.cc (riscv_file_start): New .option.
>         * config/riscv/riscv.opt: New options.
>         * configure.ac: New check.
>         * doc/invoke.texi: New def.
>
> ---
>  gcc/config.in              | 6 ++++++
>  gcc/config/riscv/riscv.cc  | 5 +++++
>  gcc/config/riscv/riscv.opt | 6 ++++++
>  gcc/configure.ac           | 5 +++++
>  gcc/doc/invoke.texi        | 6 ++++++
>  5 files changed, 28 insertions(+)
>
> diff --git a/gcc/config.in b/gcc/config.in
> index 9c53319b544..a4c39e1384d 100644
> --- a/gcc/config.in
> +++ b/gcc/config.in
> @@ -616,6 +616,12 @@
>  #endif
>
>
> +/* Define if your assembler supports -mcsr-check. */
> +#ifndef USED_FOR_TARGET
> +#undef HAVE_AS_MCSR_CHECK
> +#endif
> +
> +
>  /* Define if your Mac OS X assembler supports -mllvm -x86-pad-for-align=false.
>     */
>  #ifndef USED_FOR_TARGET
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 675d92c0961..e98e6b1f561 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -5135,6 +5135,11 @@ riscv_file_start (void)
>    if (! riscv_mrelax)
>      fprintf (asm_out_file, "\t.option norelax\n");
>
> +  /* If the user specifies "-mcsr-check" on the command line then enable csr
> +     check in the assembler.  */
> +  if (riscv_mcsr_check)
> +    fprintf (asm_out_file, "\t.option csr-check\n");
> +
>    if (riscv_emit_attribute_p)
>      riscv_emit_attribute ();
>  }
> diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
> index fbca91b956c..3a12dd47310 100644
> --- a/gcc/config/riscv/riscv.opt
> +++ b/gcc/config/riscv/riscv.opt
> @@ -132,6 +132,12 @@ Target Bool Var(riscv_mrelax) Init(1)
>  Take advantage of linker relaxations to reduce the number of instructions
>  required to materialize symbol addresses.
>
> +mcsr-check
> +Target Bool Var(riscv_mcsr_check) Init(1)
> +Enable the CSR checking for the ISA-dependent CRS and the read-only CSR.
> +The ISA-dependent CSR are only valid when the specific ISA is set.  The
> +read-only CSR can not be written by the CSR instructions.
> +
>  Mask(64BIT)
>
>  Mask(MUL)
> diff --git a/gcc/configure.ac b/gcc/configure.ac
> index 50bb61c1b61..1a9288ee659 100644
> --- a/gcc/configure.ac
> +++ b/gcc/configure.ac
> @@ -5269,6 +5269,11 @@ configured with --enable-newlib-nano-formatted-io.])
>        [-march=rv32i_zifencei2p0],,,
>        [AC_DEFINE(HAVE_AS_MARCH_ZIFENCEI, 1,
>                  [Define if the assembler understands -march=rv*_zifencei.])])
> +    gcc_GAS_CHECK_FEATURE([-mcsr-check],
> +      gcc_cv_as_riscv_csr_check,
> +      [-mcsr-check],,,
> +      [AC_DEFINE(HAVE_AS_MCSR_CHECK, 1,
> +                [Define if the assembler understands -mcsr-check.])])
>      ;;
>      loongarch*-*-*)
>      gcc_GAS_CHECK_FEATURE([.dtprelword support],
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index dd3302fcd15..7caade26b94 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -1224,6 +1224,7 @@ See RS/6000 and PowerPC Options.
>  -mbig-endian  -mlittle-endian @gol
>  -mstack-protector-guard=@var{guard}  -mstack-protector-guard-reg=@var{reg} @gol
>  -mstack-protector-guard-offset=@var{offset}}
> +-mcsr-check -mno-csr-check @gol
>
>  @emph{RL78 Options}
>  @gccoptlist{-msim  -mmul=none  -mmul=g13  -mmul=g14  -mallregs @gol
> @@ -28551,6 +28552,11 @@ linker relaxations.
>  Emit (do not emit) RISC-V attribute to record extra information into ELF
>  objects.  This feature requires at least binutils 2.32.
>
> +@item -mcsr-check
> +@itemx -mno-csr-check
> +@opindex mcsr-check
> +Enables or disables the CSR checking.
> +
>  @item -malign-data=@var{type}
>  @opindex malign-data
>  Control how GCC aligns variables and constants of array, structure, or union
> --
> 2.34.1
>