Commited to trunk 於 2022年12月14日 週三 16:27 寫道： > From: Ju-Zhe Zhong > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c: New test. > > --- > .../riscv/rvv/vsetvl/vlmax_back_prop-1.c | 36 ++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-10.c | 59 +++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-11.c | 63 +++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-12.c | 64 ++++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-13.c | 64 ++++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-14.c | 58 +++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-15.c | 143 ++++++++++++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-16.c | 54 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-17.c | 59 +++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-18.c | 58 +++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-19.c | 48 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-2.c | 50 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-20.c | 59 +++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-21.c | 50 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-22.c | 58 +++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-23.c | 41 +++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-24.c | 41 +++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-25.c | 96 +++++++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-26.c | 89 ++++++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-27.c | 51 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-28.c | 54 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-29.c | 54 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-3.c | 47 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-30.c | 44 +++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-31.c | 46 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-32.c | 46 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-33.c | 45 +++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-34.c | 45 +++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-35.c | 38 +++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-36.c | 47 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-37.c | 41 +++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-38.c | 73 +++++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-39.c | 20 +++ > .../riscv/rvv/vsetvl/vlmax_back_prop-4.c | 104 ++++++++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-40.c | 22 +++ > .../riscv/rvv/vsetvl/vlmax_back_prop-41.c | 26 +++ > .../riscv/rvv/vsetvl/vlmax_back_prop-42.c | 26 +++ > .../riscv/rvv/vsetvl/vlmax_back_prop-43.c | 27 +++ > .../riscv/rvv/vsetvl/vlmax_back_prop-44.c | 28 ++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-45.c | 34 ++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-46.c | 32 ++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-5.c | 48 ++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-6.c | 155 ++++++++++++++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-7.c | 43 +++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-8.c | 149 +++++++++++++++++ > .../riscv/rvv/vsetvl/vlmax_back_prop-9.c | 44 +++++ > 46 files changed, 2579 insertions(+) > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c > > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c > new file mode 100644 > index 00000000000..47645ee7110 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c > @@ -0,0 +1,36 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ > + > +#include "riscv_vector.h" > + > +void f (void * restrict in, void * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } > */ > +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts > "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c > new file mode 100644 > index 00000000000..d36df955a43 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c > @@ -0,0 +1,59 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, > int cond2, int cond3) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) > + { > + if (cond2 == 11) > + { > + for (int i = 0; i < n; i++) > + { > + out[i] = out[i] + 2; > + } > + } > + else if (cond2 == 111) > + { > + if (cond3 == 300) > + { > + for (int i = 0; i < n; i++) > + { > + out[i] = out[i] + out[i]; > + } > + } > + } > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" > no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c > new file mode 100644 > index 00000000000..fa818aa3b1c > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c > @@ -0,0 +1,63 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, > int cond2, int cond3) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)(in + i); > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200 + i); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300 + i); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400 + i); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500 + i); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) > + { > + if (cond2 == 11) > + { > + for (int i = 0; i < n; i++) > + { > + out[i] = out[i] + 2; > + } > + } > + else if (cond2 == 111) > + { > + if (cond3 == 300) > + { > + for (int i = 0; i < n; i++) > + { > + out[i] = out[i] + out[i]; > + } > + } else { > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 2000 + i); > + *(vfloat32mf2_t*)(out + i + 4000) = v; > + } > + } > + } > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" > no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c > new file mode 100644 > index 00000000000..324e38d3fc6 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c > @@ -0,0 +1,64 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, > int cond2, int cond3) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)(in + i); > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200 + i); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300 + i); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400 + i); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500 + i); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) > + { > + if (cond2 == 11) > + { > + for (int i = 0; i < n; i++) > + { > + out[i] = out[i] + 2; > + } > + } > + else if (cond2 == 111) > + { > + if (cond3 == 300) > + { > + for (int i = 0; i < n; i++) > + { > + out[i] = out[i] + out[i]; > + } > + } else { > + for (int i = 0; i < n; i++) { > + vint8mf2_t v = *(vint8mf2_t*)(in + 2000 + i); > + *(vint8mf2_t*)(out + i + 4000) = v; > + } > + } > + } > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" > no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c > new file mode 100644 > index 00000000000..23d21557d03 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c > @@ -0,0 +1,64 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, > int cond2, int cond3) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)(in + i); > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200 + i); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300 + i); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400 + i); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500 + i); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) > + { > + if (cond2 == 11) > + { > + for (int i = 0; i < n; i++) > + { > + out[i] = out[i] + 2; > + } > + } > + else if (cond2 == 111) > + { > + if (cond3 == 300) > + { > + for (int i = 0; i < n; i++) > + { > + out[i] = out[i] + out[i]; > + } > + } else { > + for (int i = 0; i < n; i++) { > + vint8mf2_t v = *(vint8mf2_t*)(in + 2000 + i); > + *(vint8mf2_t*)(out + i + 4000) = v; > + } > + } > + } > + } > + > + for (int i = 0; i < n; i++) { > + vint16m1_t v; > + *(vint16m1_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" > no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts > "-flto" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c > new file mode 100644 > index 00000000000..da48ce2f1f3 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c > @@ -0,0 +1,58 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) { > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 333); > + *(vint8mf8_t*)(out + i + 333) = v; > + } > + } else if (cond == 1){ > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 444); > + *(vint32mf2_t*)(out + i + 444) = v; > + } > + } else if (cond == 2) { > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 555); > + *(vint64m1_t*)(out + i + 555) = v; > + } > + } else { > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); > + *(vfloat64m1_t*)(out + i + 666) = v; > + } > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c > new file mode 100644 > index 00000000000..7dd931c9df8 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c > @@ -0,0 +1,143 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) { > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 333); > + *(vint8mf8_t*)(out + i + 333) = v; > + } > + } else if (cond == 1){ > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 444); > + *(vint32mf2_t*)(out + i + 444) = v; > + } > + } else if (cond == 2) { > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 555); > + *(vint64m1_t*)(out + i + 555) = v; > + } > + } else { > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); > + *(vfloat64m1_t*)(out + i + 666) = v; > + } > + } > + > + if (cond == 0) { > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 333); > + *(vint8mf8_t*)(out + i + 333) = v; > + } > + } else if (cond == 1){ > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 444); > + *(vint32mf2_t*)(out + i + 444) = v; > + } > + } else if (cond == 2) { > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 555); > + *(vint64m1_t*)(out + i + 555) = v; > + } > + } else { > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); > + *(vfloat64m1_t*)(out + i + 666) = v; > + } > + } > + > + if (cond == 0) { > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 333); > + *(vint8mf8_t*)(out + i + 333) = v; > + } > + } else if (cond == 1){ > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 444); > + *(vint32mf2_t*)(out + i + 444) = v; > + } > + } else if (cond == 2) { > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 555); > + *(vint64m1_t*)(out + i + 555) = v; > + } > + } else { > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); > + *(vfloat64m1_t*)(out + i + 666) = v; > + } > + } > + if (cond == 0) { > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 333); > + *(vint8mf8_t*)(out + i + 333) = v; > + } > + } else if (cond == 1){ > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 444); > + *(vint32mf2_t*)(out + i + 444) = v; > + } > + } else if (cond == 2) { > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 555); > + *(vint64m1_t*)(out + i + 555) = v; > + } > + } else { > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); > + *(vfloat64m1_t*)(out + i + 666) = v; > + } > + } > + if (cond == 0) { > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 333); > + *(vint8mf8_t*)(out + i + 333) = v; > + } > + } else if (cond == 1){ > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 444); > + *(vint32mf2_t*)(out + i + 444) = v; > + } > + } else if (cond == 2) { > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 555); > + *(vint64m1_t*)(out + i + 555) = v; > + } > + } else { > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); > + *(vfloat64m1_t*)(out + i + 666) = v; > + } > + } > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c > new file mode 100644 > index 00000000000..84abe55a2b0 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c > @@ -0,0 +1,54 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 771); > + *(vint8mf8_t*)(out + 771) = v; > + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71); > + *(vint32mf2_t*)(out + 71) = v2; > + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17); > + *(vfloat32mf2_t*)(out + 17) = v3; > + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117); > + *(vuint32mf2_t*)(out + 117) = v4; > + } else { > + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123); > + *(vfloat32mf2_t*)(out + 1123) = v0; > + vint8mf8_t v = *(vint8mf8_t*)(in + 333); > + *(vint8mf8_t*)(out + 333) = v; > + vbool64_t v2 = *(vbool64_t*)(in + 91); > + *(vbool64_t*)(out + 91) = v2; > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" > no-opts "-g" no-opts "-flto" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c > new file mode 100644 > index 00000000000..dce21cc8dbc > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c > @@ -0,0 +1,59 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) { > + for (int i = 0; i < n; i++){ > + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); > + *(vint8mf8_t*)(out + 771 + i) = v; > + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); > + *(vint32mf2_t*)(out + 71 + i) = v2; > + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); > + *(vfloat32mf2_t*)(out + 17 + i) = v3; > + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); > + *(vuint32mf2_t*)(out + 117 + i) = v4; > + } > + } else { > + for (int i = 0; i < n; i++){ > + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123 + i); > + *(vfloat32mf2_t*)(out + 1123 + i) = v0; > + vint8mf8_t v = *(vint8mf8_t*)(in + 333 + i); > + *(vint8mf8_t*)(out + 333 + i) = v; > + vbool64_t v2 = *(vbool64_t*)(in + 91 + i); > + *(vbool64_t*)(out + 91 + i) = v2; > + } > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c > new file mode 100644 > index 00000000000..18c44d6479d > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c > @@ -0,0 +1,58 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) { > + for (int i = 0; i < n; i++){ > + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); > + *(vint8mf8_t*)(out + 771 + i) = v; > + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); > + *(vint32mf2_t*)(out + 71 + i) = v2; > + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); > + *(vfloat32mf2_t*)(out + 17 + i) = v3; > + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); > + *(vuint32mf2_t*)(out + 117 + i) = v4; > + } > + } else { > + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123); > + *(vfloat32mf2_t*)(out + 1123) = v0; > + vint8mf8_t v = *(vint8mf8_t*)(in + 333); > + *(vint8mf8_t*)(out + 333) = v; > + vbool64_t v2 = *(vbool64_t*)(in + 91); > + *(vbool64_t*)(out + 91) = v2; > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c > new file mode 100644 > index 00000000000..0c6a572671a > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c > @@ -0,0 +1,48 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 771); > + *(vint8mf8_t*)(out + 771) = v; > + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71); > + *(vint32mf2_t*)(out + 71) = v2; > + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17); > + *(vfloat32mf2_t*)(out + 17) = v3; > + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117); > + *(vuint32mf2_t*)(out + 117) = v4; > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } > */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c > new file mode 100644 > index 00000000000..3e7d8f4030f > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c > @@ -0,0 +1,50 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + for (int i = 0; i < n; i++) { > + out[i] = out[i] + 2; > + } > + for (int i = 0; i < n; i++) { > + out[i] = out[i] + out[i]; > + } > + for (int i = 0; i < n; i++) { > + out[i] = out[i] * 2; > + } > + for (int i = 0; i < n; i++) { > + out[i] = out[i] * out[i]; > + } > + for (int i = 0; i < n; i++) { > + out[i] = out[i] * out[i] + 100; > + } > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } > */ > +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts > "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c > new file mode 100644 > index 00000000000..dce21cc8dbc > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c > @@ -0,0 +1,59 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) { > + for (int i = 0; i < n; i++){ > + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); > + *(vint8mf8_t*)(out + 771 + i) = v; > + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); > + *(vint32mf2_t*)(out + 71 + i) = v2; > + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); > + *(vfloat32mf2_t*)(out + 17 + i) = v3; > + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); > + *(vuint32mf2_t*)(out + 117 + i) = v4; > + } > + } else { > + for (int i = 0; i < n; i++){ > + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123 + i); > + *(vfloat32mf2_t*)(out + 1123 + i) = v0; > + vint8mf8_t v = *(vint8mf8_t*)(in + 333 + i); > + *(vint8mf8_t*)(out + 333 + i) = v; > + vbool64_t v2 = *(vbool64_t*)(in + 91 + i); > + *(vbool64_t*)(out + 91 + i) = v2; > + } > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c > new file mode 100644 > index 00000000000..7c2435ab726 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c > @@ -0,0 +1,50 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) { > + for (int i = 0; i < n; i++){ > + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); > + *(vint8mf8_t*)(out + 771 + i) = v; > + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); > + *(vint32mf2_t*)(out + 71 + i) = v2; > + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); > + *(vfloat32mf2_t*)(out + 17 + i) = v3; > + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); > + *(vuint32mf2_t*)(out + 117 + i) = v4; > + } > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c > new file mode 100644 > index 00000000000..222e0c6cbee > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c > @@ -0,0 +1,58 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) { > + for (int i = 0; i < n; i++){ > + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); > + *(vint8mf8_t*)(out + 771 + i) = v; > + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); > + *(vint32mf2_t*)(out + 71 + i) = v2; > + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); > + *(vfloat32mf2_t*)(out + 17 + i) = v3; > + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); > + *(vuint32mf2_t*)(out + 117 + i) = v4; > + } > + } else { > + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123); > + *(vfloat32mf2_t*)(out + 1123) = v0; > + vint8mf8_t v = *(vint8mf8_t*)(in + 333); > + *(vint8mf8_t*)(out + 333) = v; > + vbool64_t v2 = *(vbool64_t*)(in + 91); > + *(vbool64_t*)(out + 91) = v2; > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c > new file mode 100644 > index 00000000000..1dd55cdbb0d > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c > @@ -0,0 +1,41 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + vint32mf2_t v; > + *(vint32mf2_t*)(out + 7000) = v; > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c > new file mode 100644 > index 00000000000..931bba5389d > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c > @@ -0,0 +1,41 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + vint32mf2_t v; > + *(vint32mf2_t*)(out + 7000) = v; > + > + for (int i = 0; i < n; i++) { > + vbool64_t v; > + *(vbool64_t*)(out + i + 700) = v; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c > new file mode 100644 > index 00000000000..93015e0c5f5 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c > @@ -0,0 +1,96 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (void * restrict in, void * restrict out, int n, int cond) > +{ > + if (cond == 0) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 100); > + *(vint8mf8_t*)(out + 100) = v; > + for (int i = 0; i < n; i++) > + { > + vint16mf4_t v2; > + *(vint16mf4_t*)(out + i + 100) = v2; > + } > + } else if (cond == 1) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 200); > + *(vint8mf8_t*)(out + 200) = v; > + for (int i = 0; i < n; i++) > + { > + vint32mf2_t v2; > + *(vint32mf2_t*)(out + i + 200) = v2; > + } > + } else if (cond == 2) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 300); > + *(vint8mf8_t*)(out + 300) = v; > + for (int i = 0; i < n; i++) > + { > + vint8mf8_t v2; > + *(vint8mf8_t*)(out + i + 300) = v2; > + } > + } else if (cond == 3) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 400); > + *(vint8mf8_t*)(out + 400) = v; > + for (int i = 0; i < n; i++) > + { > + vint64m1_t v2; > + *(vint64m1_t*)(out + i + 400) = v2; > + } > + } else if (cond == 4) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 500); > + *(vint8mf8_t*)(out + 500) = v; > + for (int i = 0; i < n; i++) > + { > + vfloat32mf2_t v2; > + *(vfloat32mf2_t*)(out + i + 500) = v2; > + } > + } else if (cond == 5) { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 600); > + *(vuint8mf8_t*)(out + 600) = v; > + for (int i = 0; i < n; i++) > + { > + vuint16mf4_t v2; > + *(vuint16mf4_t*)(out + i + 600) = v2; > + } > + } else if (cond == 6) { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 700); > + *(vuint8mf8_t*)(out + 700) = v; > + for (int i = 0; i < n; i++) > + { > + vuint32mf2_t v2; > + *(vuint32mf2_t*)(out + i + 700) = v2; > + } > + } else if (cond == 7) { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 800); > + *(vuint8mf8_t*)(out + 800) = v; > + for (int i = 0; i < n; i++) > + { > + vuint8mf8_t v2; > + *(vuint8mf8_t*)(out + i + 800) = v2; > + } > + } else if (cond == 8) { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900); > + *(vuint8mf8_t*)(out + 900) = v; > + for (int i = 0; i < n; i++) > + { > + vuint64m1_t v2; > + *(vuint64m1_t*)(out + i + 900) = v2; > + } > + } else { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 1000); > + *(vuint8mf8_t*)(out + 1000) = v; > + for (int i = 0; i < n; i++) > + { > + vfloat32mf2_t v2; > + *(vfloat32mf2_t*)(out + i + 1000) = v2; > + } > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 10 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 20 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c > new file mode 100644 > index 00000000000..adb831d3ee1 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c > @@ -0,0 +1,89 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (void * restrict in, void * restrict out, int n, int cond) > +{ > + if (cond == 0) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 100); > + *(vint8mf8_t*)(out + 100) = v; > + for (int i = 0; i < n; i++) > + { > + vint16mf4_t v2; > + *(vint16mf4_t*)(out + i + 100) = v2; > + } > + } else if (cond == 1) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 200); > + *(vint8mf8_t*)(out + 200) = v; > + for (int i = 0; i < n; i++) > + { > + vint32mf2_t v2; > + *(vint32mf2_t*)(out + i + 200) = v2; > + } > + } else if (cond == 2) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 300); > + *(vint8mf8_t*)(out + 300) = v; > + for (int i = 0; i < n; i++) > + { > + vint8mf8_t v2; > + *(vint8mf8_t*)(out + i + 300) = v2; > + } > + } else if (cond == 3) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 400); > + *(vint8mf8_t*)(out + 400) = v; > + for (int i = 0; i < n; i++) > + { > + vint64m1_t v2; > + *(vint64m1_t*)(out + i + 400) = v2; > + } > + } else if (cond == 4) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 500); > + *(vint8mf8_t*)(out + 500) = v; > + for (int i = 0; i < n; i++) > + { > + vfloat32mf2_t v2; > + *(vfloat32mf2_t*)(out + i + 500) = v2; > + } > + } else if (cond == 5) { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 600); > + *(vuint8mf8_t*)(out + 600) = v; > + for (int i = 0; i < n; i++) > + { > + vuint16mf4_t v2; > + *(vuint16mf4_t*)(out + i + 600) = v2; > + } > + } else if (cond == 6) { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 700); > + *(vuint8mf8_t*)(out + 700) = v; > + for (int i = 0; i < n; i++) > + { > + vuint32mf2_t v2; > + *(vuint32mf2_t*)(out + i + 700) = v2; > + } > + } else if (cond == 7) { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 800); > + *(vuint8mf8_t*)(out + 800) = v; > + for (int i = 0; i < n; i++) > + { > + vuint8mf8_t v2; > + *(vuint8mf8_t*)(out + i + 800) = v2; > + } > + } else if (cond == 8) { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900); > + *(vuint8mf8_t*)(out + 900) = v; > + for (int i = 0; i < n; i++) > + { > + vuint64m1_t v2; > + *(vuint64m1_t*)(out + i + 900) = v2; > + } > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 8 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 17 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c > new file mode 100644 > index 00000000000..16a5f2d98fb > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c > @@ -0,0 +1,51 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (void * restrict in, void * restrict out, void * restrict in2, > void * restrict out2, int n, int cond) > +{ > + if (cond == 0) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 100); > + *(vint8mf8_t*)(out + 100) = v; > + for (int i = 0; i < n; i++) > + { > + vint16mf4_t v2; > + *(vint16mf4_t*)(out + i + 100) = v2; > + } > + } else { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 1000); > + *(vuint8mf8_t*)(out + 1000) = v; > + for (int i = 0; i < n; i++) > + { > + vfloat32mf2_t v2; > + *(vfloat32mf2_t*)(out + i + 1000) = v2; > + vbool64_t v3; > + *(vbool64_t*)(out + i + 2000) = v3; > + vbool32_t v4; > + *(vbool32_t*)(out + i + 3000) = v4; > + vbool16_t v5; > + *(vbool16_t*)(out + i + 4000) = v5; > + vbool8_t v6; > + *(vbool8_t*)(out + i + 5000) = v6; > + vbool4_t v7; > + *(vbool4_t*)(out + i + 6000) = v7; > + vbool2_t v8; > + *(vbool2_t*)(out + i + 7000) = v8; > + vbool1_t v9; > + *(vbool1_t*)(out + i + 8000) = v9; > + } > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c > new file mode 100644 > index 00000000000..366b5cf4925 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c > @@ -0,0 +1,54 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (void * restrict in, void * restrict out, void * restrict in2, > void * restrict out2, int n, int cond) > +{ > + if (cond == 0) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 100); > + *(vint8mf8_t*)(out + 100) = v; > + for (int i = 0; i < n; i++) > + { > + vint16mf4_t v2; > + *(vint16mf4_t*)(out + i + 100) = v2; > + } > + } else { > + vuint8mf8_t v = *(vuint8mf8_t*)(in + 1000); > + *(vuint8mf8_t*)(out + 1000) = v; > + for (int i = 0; i < n; i++) > + { > + vfloat32mf2_t v2; > + *(vfloat32mf2_t*)(out + i + 1000) = v2; > + vbool64_t v3; > + *(vbool64_t*)(out + i + 2000) = v3; > + vbool32_t v4; > + *(vbool32_t*)(out + i + 3000) = v4; > + vbool16_t v5; > + *(vbool16_t*)(out + i + 4000) = v5; > + vbool8_t v6; > + *(vbool8_t*)(out + i + 5000) = v6; > + vbool4_t v7; > + *(vbool4_t*)(out + i + 6000) = v7; > + vbool2_t v8; > + *(vbool2_t*)(out + i + 7000) = v8; > + vbool1_t v9; > + *(vbool1_t*)(out + i + 8000) = v9; > + vuint32mf2_t v10; > + *(vuint32mf2_t*)(out + i + 100000) = v10; > + } > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 10 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c > new file mode 100644 > index 00000000000..cbd7a8b1a6b > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c > @@ -0,0 +1,54 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (void * restrict in, void * restrict out, void * restrict in2, > void * restrict out2, int n, int cond) > +{ > + if (cond == 0) { > + vint8mf8_t v = *(vint8mf8_t*)(in + 100); > + *(vint8mf8_t*)(out + 100) = v; > + for (int i = 0; i < n; i++) > + { > + vint16mf4_t v2; > + *(vint16mf4_t*)(out + i + 100) = v2; > + } > + } else { > + vuint8mf8_t v; > + *(vuint8mf8_t*)(out + 1000) = v; > + for (int i = 0; i < n; i++) > + { > + vfloat32mf2_t v2; > + *(vfloat32mf2_t*)(out + i + 1000) = v2; > + vbool64_t v3; > + *(vbool64_t*)(out + i + 2000) = v3; > + vbool32_t v4; > + *(vbool32_t*)(out + i + 3000) = v4; > + vbool16_t v5; > + *(vbool16_t*)(out + i + 4000) = v5; > + vbool8_t v6; > + *(vbool8_t*)(out + i + 5000) = v6; > + vbool4_t v7; > + *(vbool4_t*)(out + i + 6000) = v7; > + vbool2_t v8; > + *(vbool2_t*)(out + i + 7000) = v8; > + vbool1_t v9; > + *(vbool1_t*)(out + i + 8000) = v9; > + vuint32mf2_t v10; > + *(vuint32mf2_t*)(out + i + 100000) = v10; > + } > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 11 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c > new file mode 100644 > index 00000000000..f6ac96fe900 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c > @@ -0,0 +1,47 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) > +{ > + for (int i = 0; i < n; i++) { > + vint8mf8_t v = *(vint8mf8_t*)in; > + *(vint8mf8_t*)(out + i + 200) = v; > + } > + for (int i = 0; i < n; i++) { > + vint32mf2_t v = *(vint32mf2_t*)(in + 200); > + *(vint32mf2_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vint64m1_t v = *(vint64m1_t*)(in + 300); > + *(vint64m1_t*)(out + i + 400) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); > + *(vfloat32mf2_t*)(out + i + 500) = v; > + } > + for (int i = 0; i < n; i++) { > + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); > + *(vfloat64m1_t*)(out + i + 600) = v; > + } > + > + if (cond == 0) { > + for (int i = 0; i < n; i++) { > + out[i] = out[i] + 2; > + } > + } else { > + for (int i = 0; i < n; i++) { > + out[i] = out[i] + 3; > + } > + } > + > + for (int i = 0; i < n; i++) { > + vint16mf4_t v; > + *(vint16mf4_t*)(out + i + 700) = v; > + } > +} > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts > "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ > + > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c > new file mode 100644 > index 00000000000..3d800a1daef > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c > @@ -0,0 +1,44 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (void * restrict in, void * restrict out, void * restrict in2, > void * restrict out2, int n, int cond) > +{ > + for (int i = 0; i < n; i++) > + { > + vfloat32mf2_t v2 = *(vfloat32mf2_t*)(in + i + 1000); > + *(vfloat32mf2_t*)(out + i + 1000) = v2; > + vbool32_t v4; > + *(vbool32_t*)(out + i + 3000) = v4; > + vbool16_t v5; > + *(vbool16_t*)(out + i + 4000) = v5; > + vbool8_t v6; > + *(vbool8_t*)(out + i + 5000) = v6; > + vbool4_t v7; > + *(vbool4_t*)(out + i + 6000) = v7; > + vbool2_t v8; > + *(vbool2_t*)(out + i + 7000) = v8; > + vbool1_t v9; > + *(vbool1_t*)(out + i + 8000) = v9; > + vuint32mf2_t v10 = *(vuint32mf2_t*)(in + i + 100000); > + *(vuint32mf2_t*)(out + i + 100000) = v10; > + } > + > + for (int i = 0; i < n; i++) > + { > + vint8mf8_t v1; > + *(vint8mf8_t*)(out + i + 10) = v1; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} > 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > + > +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c > new file mode 100644 > index 00000000000..ad954f7c51c > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c > @@ -0,0 +1,46 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (void * restrict in, void * restrict out, void * restrict in2, > void * restrict out2, int n, int cond) > +{ > + for (int i = 0; i < n; i++) > + { > + vuint16mf4_t v2 = *(vuint16mf4_t*)(in + i + 1000); > + *(vuint16mf4_t*)(out + i + 1000) = v2; > + vbool32_t v4; > + *(vbool32_t*)(out + i + 3000) = v4; > + vbool16_t v5; > + *(vbool16_t*)(out + i + 4000) = v5; > + vbool8_t v6; > + *(vbool8_t*)(out + i + 5000) = v6; > + vbool4_t v7; > + *(vbool4_t*)(out + i + 6000) = v7; > + vbool2_t v8; > + *(vbool2_t*)(out + i + 7000) = v8; > + vbool1_t v9; > + *(vbool1_t*)(out + i + 8000) = v9; > + vuint32mf2_t v10 = *(vuint32mf2_t*)(in + i + 100000); > + *(vuint32mf2_t*)(out + i + 100000) = v10; > + } > + > + for (int i = 0; i < n; i++) > + { > + vint8mf8_t v1; > + *(vint8mf8_t*)(out + i + 10) = v1; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { > no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts > "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > + > +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts > "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } > } } } */ > diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c > b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c > new file mode 100644 > index 00000000000..aa4dac4e000 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c > @@ -0,0 +1,46 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ > + > +#include "riscv_vector.h" > + > +void f (void * restrict in, void * restrict out, void * restrict in2, > void * restrict out2, int n, int cond) > +{ > + for (int i = 0; i < n; i++) > + { > + vuint16mf4_t v2 = *(vuint16mf4_t*)(in + i + 1000); > + *(vuint16mf4_t*)(out + i + 1000) = v2; > + vbool32_t v4; > + *(vbool32_t*)(out + i + 3000) = v4; > + vbool16_t v5; > + *(vbool16_t*)(out + i + 4000) = v5; > + vbool8_t v6; > + *(vbool8_t*)(out + i + 5000) = v6; > + vbool4_t v7; > + *(vbool4_t*)(out + i + 6000) = v7; > + vbool2_t v8; > + *(vbool2_t*)(out + i + 7000) = v8; > + vbool1_t v9; > + *(vbool1_t*)(out + i + 8000) = v9; > + vuint32mf2_t v10; > + *(vuint32mf2_t*)(out + i + 100000) = v10; > + } > + > + for (int i = 0; i < n; i++) > + { > + vint8mf8_t v1 = *(vint8mf8_t*)(in + i + 100000); > + *(vint8mf8_t*)(out + i + 10) = v1; > + } > +} > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > + > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]:+} > 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts > "-funroll-loops" no-opts "-g" } } } } */ > +/* { dg-final { scan-assembler-times > {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} > 1 { target {