Re: [RFC]RISC-V: Support RV64-ILP32

[Kito Cheng <kito.cheng@gmail.com>]

I would suggest you could send all necessary parts like binutils,
glibc and/or qemu together future, so that we could easier test that?


On Wed, Dec 28, 2022 at 2:25 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>
> On Tue, 27 Dec 2022 10:24:10 PST (-0800), gcc-patches@gcc.gnu.org wrote:
> >
> >
> > On 12/12/22 23:49, shihua@iscas.ac.cn wrote:
> >> From: Liao Shihua <shihua@iscas.ac.cn>
> >>
> >>        This patch support rv64 insn in ilp32 ABI. It was inspired by aarch64 both
> >>     support 64-bit and 32-bit ABI with the same set of instructions.
> >>
> >>
> >> gcc/ChangeLog:
> >>
> >>          * config.gcc:  Implememt ilp32* with rv64*.
> >>          * config/riscv/riscv.cc (riscv_option_override): Remove the constraint between RV64 and ILP32.
> >>          * config/riscv/riscv.h (TARGET_ILP32): Define TARGET_ILP32 with riscv_abi.
> >>          (POINTER_SIZE):POINTER_SIZE will change with TARGET_ILP32.
> >>          (Pmode):Likewise.
> >>          * config/riscv/riscv.md: Convert split mode with Pmode and change mode form Xmode to Pmode in stack_tie.
> > This is a new feature and thus I think we should defer to gcc-14 unless
> > there is a compelling need.
>
> I agree.  This is a pretty big one with a lot of ABI-related
> complications, so let's just play it safe.