From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ua1-x932.google.com (mail-ua1-x932.google.com [IPv6:2607:f8b0:4864:20::932]) by sourceware.org (Postfix) with ESMTPS id 73C263858D28 for ; Sun, 5 Mar 2023 09:27:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 73C263858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ua1-x932.google.com with SMTP id g19so4487698ual.4 for ; Sun, 05 Mar 2023 01:27:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1678008469; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=PH2yKTW7pb6nVCaBptkm+Zf5DGY16JBJWI+KWex/1Q8=; b=A/kfrYBL/bWbMxSsaepCDxYM2nvJ66uQkUTU/NkCXVryIF/RE7mAUkEMV7LWSD5apX PMCQdk6/do72RODYDuIOutoxvYA2+NqsoX2bV0vKQkJP/q8ZcDhYgE9UokQacowU+hkr bF1gEsfDnGW2nQizxZeigb3y9v7jVRv0VFzMwa9wGhrFnytd3uqMnKKvIe+x3eu8Us02 x3QLwq+svbMbyyDJ/Kf75ddn2Z499HFvvx16fLJVnVnA7Z0hgNGm2EnJht6RQI295xHA wXIhZj13lqhLbX7yJoOI+yaakiVkiaEP0uDkOYoThLmh5n/aCwTm9T6eBV9zXX55oAvO WdUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678008469; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PH2yKTW7pb6nVCaBptkm+Zf5DGY16JBJWI+KWex/1Q8=; b=ihMRZ8YxGGN4/lqDTtwPZhmEOnFqxl22grwzM2yASgi3UhkIfHHhuc9NjTjih/zfwA B4dWWw3hTjZEeCGE7ly08y3jZKYMYOv6A+7X0LvvBEXsOfNZDZ2dkDI46YnBb0F7Qn/p V8JntOFEny3kM2/ZoHaieHPWZSHZ+LFtxop3PDedMVZ8dnQQ6ly9lrqO6CgYD6fJsWpp TKguXp4UK5FmzNpe451F+yL8Il14jz+/p3R4Eq2G8ITzaZciVWgl2RPT6C5ztIdJCllm DoHiCcavGLOEtyvGNDPLk7N/lk5bHT2bfmHxBGARYql8zuW5bFHCYiXX+BdJB7iPUEM2 uczg== X-Gm-Message-State: AO0yUKVqmyMXiqgchJgSF4285leLwxvT5XtX5Crki1000cQltYgKJvLd xY7objfOLiUoaasNjq8zln8sg4smghAtjIVN2ow= X-Google-Smtp-Source: AK7set/7uy5J39QNwgWoe3H5cMI71O6/KeHzjy8cm3fOEI/NH3tMrDmc8+/GBWBeJj592luu8M/aQjI4hGsBtlsovPE= X-Received: by 2002:a1f:6d42:0:b0:401:b9fd:7053 with SMTP id i63-20020a1f6d42000000b00401b9fd7053mr4780737vkc.2.1678008468603; Sun, 05 Mar 2023 01:27:48 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Kito Cheng Date: Sun, 5 Mar 2023 17:27:37 +0800 Message-ID: Subject: Re: [PATCH] RISC-V: Allow const0_rtx operand in max/min To: Sinan Cc: gcc-patches , palmer , jlaw Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Committed, thanks! On Tue, Feb 28, 2023 at 12:36=E2=80=AFPM Sinan wrote: > > From 73e743348a49a7fffcf2e328b8179e8dbbc3b2b4 Mon Sep 17 00:00:00 2001 > From: Lin Sinan > Date: Tue, 28 Feb 2023 00:44:55 +0800 > Subject: [PATCH] RISC-V: Allow const0_rtx operand in max/min > > Optimize cases that use max[u]/min[u] against a zero constant. > E.g., the case int f(int x) { return x >=3D 0 ? x : 0; } > the current asm output in rv64gc_zba_zbb > li rtmp,0 > max a0,a0,rtmp > could be optimized into > max a0,a0,zero > > gcc/ChangeLog: > > * config/riscv/bitmanip.md: allow 0 constant in max/min > pattern. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/zbb-min-max-03.c: New test. > > --- > gcc/config/riscv/bitmanip.md | 4 ++-- > gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c | 10 ++++++++++ > 2 files changed, 12 insertions(+), 2 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c > > diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md > index 58a86bd929f..f771835369c 100644 > --- a/gcc/config/riscv/bitmanip.md > +++ b/gcc/config/riscv/bitmanip.md > @@ -363,9 +363,9 @@ > (define_insn "3" > [(set (match_operand:X 0 "register_operand" "=3Dr") > (bitmanip_minmax:X (match_operand:X 1 "register_operand" "r") > - (match_operand:X 2 "register_operand" "r")))] > + (match_operand:X 2 "reg_or_0_operand" "rJ")))] > "TARGET_ZBB" > - "\t%0,%1,%2" > + "\t%0,%1,%z2" > [(set_attr "type" "bitmanip")]) > > ;; Optimize the common case of a SImode min/max against a constant > diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c b/gcc/testsu= ite/gcc.target/riscv/zbb-min-max-03.c > new file mode 100644 > index 00000000000..947300d599d > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c > @@ -0,0 +1,10 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=3Drv64gc_zba_zbb -mabi=3Dlp64d" } */ > +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ > + > +int f(int x) { > + return x >=3D 0 ? x : 0; > +} > + > +/* { dg-final { scan-assembler-times "max\t" 1 } } */ > +/* { dg-final { scan-assembler-not "li\t" } } */ > -- > 2.34.1 >