Re: [PATCH V3] RISC-V: Enable basic RVV auto-vectorization support.

[Kito Cheng <kito.cheng@gmail.com>]

Just one minor comment otherwise LGTM.

> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 45a63cab9c9..1a35e02796d 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -3793,6 +3793,14 @@ riscv_get_arg_info (struct riscv_arg_info *info, const CUMULATIVE_ARGS *cum,
>
>    if (named)
>      {
> +      /* TODO: Currently, it will produce ICE for --param
> +        riscv-autovec-preference=fixed-vlmax. So, we just return NULL_RTX here
> +        let GCC genearte loads/stores. Ideally, GCC should either report
> +        Warning message to tell user do not use RVV vector type in function
> +        arg, or GCC just support function arg calling convention for RVV
> +        directly.  */
> +      if (riscv_v_ext_mode_p (mode))
> +       return NULL_RTX;

Plz move this outside the if block become something like:

/* Your comment here.  */
if (riscv_v_ext_mode_p (mode))
  return NULL_RTX;
if (named)
  {


>        riscv_aggregate_field fields[2];
>        unsigned fregno = fpr_base + info->fpr_offset;
>        unsigned gregno = gpr_base + info->gpr_offset;