From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vs1-xe2e.google.com (mail-vs1-xe2e.google.com [IPv6:2607:f8b0:4864:20::e2e]) by sourceware.org (Postfix) with ESMTPS id 754133858028 for ; Fri, 14 Jul 2023 02:41:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 754133858028 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-vs1-xe2e.google.com with SMTP id ada2fe7eead31-440ad576d87so569617137.1 for ; Thu, 13 Jul 2023 19:41:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1689302480; x=1691894480; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=3NHKexyBoU+7DL6+FCw/soilOuivrVDNrGEuILrE52I=; b=dPpbnNyaIPavegNUDM4tgTYyW0KzVRSIi2JiU8HvZajouOVrP+lW4EX1RYFKokYa2N Jm8YhaJRBztlOTJa+OrEFhyjmpIGVFXQDPOvS7qyuKArfeWwTbhmVnu5p/8haXgZE72F SaD+ABKL3C82XlJD6Z46MteVM/ss2BSThaiNC0yj0ONvzXSIKQTAnIIXhiq2+0ehZQ5A d21bXVmsSWQn4N0Y1Is8KodYgpu0Bt7N6kU/YfevlrA/9AlzK6DqGIEfJMWTmL8bYiqL ZHYzxJVp+KzMFfvFwvhZ7PCGPVGv165Vrxe+HVQxK+7CaMGzqfbJt4K2UV+C2ONCfqHH N4yA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689302480; x=1691894480; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3NHKexyBoU+7DL6+FCw/soilOuivrVDNrGEuILrE52I=; b=jq+POR4x/qbJvZwOc4VlT2nddpc32pMgAT/1FYkdHGJcJU4JZtz5tsek8LSfgUfF62 0X/LvxCCVqOmeYfenAf2j2V+OgaOj4r9n74a4fik6L1ZZ76b5y/KoZ+nfdGj04WhFpJE jdqFkcf8qQGMdir9bmIRZiOuva8JfAI9daftsa18I62CWrvg/Xt0QOdbTCIShx46NGp1 GVT5E099g18nJeqgSy7wl4PVp3rCQFP9WCADIbBTg5JUrt8zThh4aeIBoyN4sFk990/m WfkFTnwaqToxMjcrc57pq8pZvL3pbHWQN/j07uvoAWLU324GTuePpoYnu4ROdmD9nI0g T+gg== X-Gm-Message-State: ABy/qLbFIFIQCq16BKSUdrOXpaJEE7cx630Zoly+A790pS9RmK+2ZVef ymcscMt45d63keq4GVHE8HjcYP5ztQPP182Yux4= X-Google-Smtp-Source: APBJJlEyQekUF4ahh3gB8AQWaVNiMMv+MAFD1SrkCFHqNmmEPZWi/4hM31NfgxjqHHsQhcKLrkVHpGwoPdVlQhf8Ntg= X-Received: by 2002:a67:e3d4:0:b0:443:848b:b6c4 with SMTP id k20-20020a67e3d4000000b00443848bb6c4mr2773948vsm.18.1689302479836; Thu, 13 Jul 2023 19:41:19 -0700 (PDT) MIME-Version: 1.0 References: <20230714020205.16214-1-lidie@eswincomputing.com> In-Reply-To: From: Kito Cheng Date: Fri, 14 Jul 2023 10:41:08 +0800 Message-ID: Subject: Re: [PATCH] RISC-V: Remove the redundant expressions in the and3. To: Palmer Dabbelt Cc: lidie@eswincomputing.com, gcc-patches@gcc.gnu.org, jeffeyalaw@gmail.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Expanding without DONE or FAIL will leave the pattern as well, so this patch is fine IMO, so this patch LGTM, but anyway I will test this and commit if passed :) On Fri, Jul 14, 2023 at 10:34=E2=80=AFAM Palmer Dabbelt wrote: > > On Thu, 13 Jul 2023 19:02:05 PDT (-0700), lidie@eswincomputing.com wrote: > > When generating the gen_and3 function based on the and3 > > template, it produces the expression emit_insn (gen_rtx_SET (operand0, > > gen_rtx_AND (, operand1, operand2)));, which is identical to the > > portion I removed in this patch. Therefore, the redundant portion can b= e > > deleted. > > > > Signed-off-by: Die Li > > > > gcc/ChangeLog: > > > > * config/riscv/riscv.md: Remove redundant portion in and3= . > > --- > > gcc/config/riscv/riscv.md | 5 ----- > > 1 file changed, 5 deletions(-) > > > > diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md > > index 7988026d129..c4f8eb9488e 100644 > > --- a/gcc/config/riscv/riscv.md > > +++ b/gcc/config/riscv/riscv.md > > @@ -1491,11 +1491,6 @@ > > DONE; > > } > > } > > - else > > - { > > - emit_move_insn (operands[0], gen_rtx_AND (mode, operands[1= ], operands[2])); > > - DONE; > > - } > > }) > > > > (define_insn "*and3" > > Unless I'm missing something, this will just result in no emitted > instructions for this "and" pattern? That seems wrong, it would at > least have to put the source into the dest -- but > "arith_operand_or_mode_mask" can contain values that don't just result > in an extension (like arbitrary register values, for example), so I > think we need the "and" operation. > > Does this pass the regression suite? > > Either way, if this branch of the conditional can't trigger we should > tighten the constraint (or at a bare minimum add a comment as to why).