LGTM, thanks :) Palmer Dabbelt 於 2023年5月12日 週五 06:32 寫道: > The vector shift immediates happen to have the same constraints as some > of the CSR-related operands, but it's a different usage. This adds a > name for them, so I don't get confused again next time. > > gcc/ChangeLog: > > * config/riscv/autovec.md (shifts): Use > vector_scalar_shift_operand. > * config/riscv/predicates.md (vector_scalar_shift_operand): New > predicate. > --- > Still haven't built-tested it, my box is busy. > > Changes since v1 <20230511182555.26183-1-palmer@rivosinc.com>: > * Change the name to "vector_scalar_shift_operand", as per Juzhe's > suggestion. > * Add a missing second ";" in the comment. > --- > gcc/config/riscv/autovec.md | 2 +- > gcc/config/riscv/predicates.md | 5 +++++ > 2 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md > index ac0c939d277..4561fcbe957 100644 > --- a/gcc/config/riscv/autovec.md > +++ b/gcc/config/riscv/autovec.md > @@ -132,7 +132,7 @@ (define_expand "3" > [(set (match_operand:VI 0 "register_operand") > (any_shift:VI > (match_operand:VI 1 "register_operand") > - (match_operand: 2 "csr_operand")))] > + (match_operand: 2 "vector_scalar_shift_operand")))] > "TARGET_VECTOR" > { > if (!CONST_SCALAR_INT_P (operands[2])) > diff --git a/gcc/config/riscv/predicates.md > b/gcc/config/riscv/predicates.md > index e5adf06fa25..90e6f942c97 100644 > --- a/gcc/config/riscv/predicates.md > +++ b/gcc/config/riscv/predicates.md > @@ -43,6 +43,11 @@ (define_predicate "csr_operand" > (ior (match_operand 0 "const_csr_operand") > (match_operand 0 "register_operand"))) > > +;; V has 32-bit unsigned immediates. This happens to be the same > constraint as > +;; the csr_operand, but it's not CSR related. > +(define_predicate "vector_scalar_shift_operand" > + (match_operand 0 "csr_operand")) > + > (define_predicate "sle_operand" > (and (match_code "const_int") > (match_test "SMALL_OPERAND (INTVAL (op) + 1)"))) > -- > 2.40.0 > >