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To: Palmer Dabbelt Cc: juzhe.zhong@rivai.ai, schwab@linux-m68k.org, gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Alternative fix for those testcase has posted: https://gcc.gnu.org/pipermail/gcc-patches/2022-November/605126.html On Tue, Nov 1, 2022 at 11:36 AM Palmer Dabbelt wrote: > > On Mon, 31 Oct 2022 16:52:25 PDT (-0700), juzhe.zhong@rivai.ai wrote: > > These cases actually doesn't care about -mabi, they just need 'v' in -march. > > Can you tell me how to fix these testcases for "fails on targets without ilp32d" ? > > These failures are bogus failures since if you specify -mabi=ilp32d when you are using GNU toolchain which is build up with "--arch=ilp32" let say. > > It will fail. Report there is no "ilp32d". So I fix these testcase by replacing "ilp32d" into "ilp32". > > So the problem is this just moves the failures around, rather than > failing on toolchains that lack ilp32d support it'll fail on toolchains > that lack ilp32 support. The ABI naming scheme sort of makes them look > like extensions, but they're just incompatible with each other. > > I can see a handful of ways to fix this: > > * Add some sort of automatic ABI scheme to GCC. LLVM already does this > and there was a GCC patch for it that had some issues, but IMO having > something like -mabi=auto-{min,max} would be useful as users keep > running into this problem. We could also add something to DejaGNU > that does this. > * Add some sort of -march=+v to GCC, along the lines of the .option > arch,+v stuff in assembly but from the command line. I seem to > remember proposals for that floating around somewhere, but can't find > anything. This could probably also to DejaGNU. > * Decorate all these V functions with the +arch attributes. That > wouldn't require any compiler changes, but it's kind of clunky. > * Add some sort of test suite logic (maybe in DejaGNU?) to check and see > if the desired ABI is linkable before attempting to do so. That might > be generically useful. > > > Thank you. > > > > > > > > juzhe.zhong@rivai.ai > > > > From: Palmer Dabbelt > > Date: 2022-11-01 06:30 > > To: gcc-patches > > CC: juzhe.zhong; gcc-patches; schwab; Kito Cheng > > Subject: Re: [PATCH] RISC-V: Fix RVV testcases. > > On Mon, 31 Oct 2022 15:00:49 PDT (-0700), gcc-patches@gcc.gnu.org wrote: > >> > >> On 10/30/22 19:40, juzhe.zhong@rivai.ai wrote: > >>> From: Ju-Zhe Zhong > >>> > >>> gcc/testsuite/ChangeLog: > >>> > >>> * gcc.target/riscv/rvv/base/abi-2.c: Change ilp32d to ilp32. > >>> * gcc.target/riscv/rvv/base/abi-3.c: Ditto. > >>> * gcc.target/riscv/rvv/base/abi-4.c: Ditto. > >>> * gcc.target/riscv/rvv/base/abi-5.c: Ditto. > >>> * gcc.target/riscv/rvv/base/abi-6.c: Ditto. > >>> * gcc.target/riscv/rvv/base/abi-7.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-1.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-10.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-11.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-12.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-13.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-2.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-3.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-4.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-5.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-6.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-7.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-8.c: Ditto. > >>> * gcc.target/riscv/rvv/base/mov-9.c: Ditto. > >>> * gcc.target/riscv/rvv/base/pragma-1.c: Ditto. > >>> * gcc.target/riscv/rvv/base/user-1.c: Ditto. > >>> * gcc.target/riscv/rvv/base/user-2.c: Ditto. > >>> * gcc.target/riscv/rvv/base/user-3.c: Ditto. > >>> * gcc.target/riscv/rvv/base/user-4.c: Ditto. > >>> * gcc.target/riscv/rvv/base/user-5.c: Ditto. > >>> * gcc.target/riscv/rvv/base/user-6.c: Ditto. > >>> * gcc.target/riscv/rvv/base/vsetvl-1.c: Ditto. > >> > >> I'm pretty new to the RISC-V world, but don't some of the cases > >> (particularly the abi-* tests) verify that the ABI specification does > >> not override the arch specification WRT availability of types? > > > > I think that depends on what the ABI specification says here, as it > > could really go many ways. Most of the RISC-V targets just use -mabi to > > control how arguments end up passed in functions, not the availability > > of types. I can't find the ABI spec for these, though, so I'm not > > entirely sure how they're supposed to work... > > > > That said, I'm not sure why we need any of these -mabi changes? Just > > from spot checking some of the examples it doesn't look like there > > should be any functional difference between ilp32 and ilp32d here: > > -march is always specified so ilp32d looks valid. If this is just to > > fix the "fails on targets without ilp32d" [1], then IMO it's not really > > a fix: we're essentially just changing that to "fails on targets without > > ilp32", we either need some sort of automatic march/mabi setting or a > > dependency on the availiable multilibs. Some of these can probably > > avoid linking, but we'll have execution tests at some point. > > > > 1: https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604644.html > >