Merged into previou patch and commited

<juzhe.zhong@rivai.ai> 於 2022年12月19日 週一 18:55 寫道：

> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: Fix asm check.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c: Ditto.
>         * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c: Ditto.
>
> ---
>  .../riscv/rvv/vsetvl/vlmax_back_prop-1.c      |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-10.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-11.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-12.c     |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_back_prop-13.c     |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_back_prop-14.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-15.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-17.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-18.c     |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_back_prop-19.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-2.c      |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-20.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-21.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-22.c     |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_back_prop-23.c     |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_back_prop-24.c     |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_back_prop-25.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-26.c     |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_back_prop-27.c     | 16 +++++-----
>  .../riscv/rvv/vsetvl/vlmax_back_prop-28.c     | 16 +++++-----
>  .../riscv/rvv/vsetvl/vlmax_back_prop-29.c     | 16 +++++-----
>  .../riscv/rvv/vsetvl/vlmax_back_prop-3.c      |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-30.c     | 14 ++++-----
>  .../riscv/rvv/vsetvl/vlmax_back_prop-31.c     | 16 +++++-----
>  .../riscv/rvv/vsetvl/vlmax_back_prop-32.c     | 16 +++++-----
>  .../riscv/rvv/vsetvl/vlmax_back_prop-33.c     | 16 +++++-----
>  .../riscv/rvv/vsetvl/vlmax_back_prop-34.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-35.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-36.c     |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_back_prop-37.c     |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_back_prop-38.c     |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_back_prop-39.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-4.c      |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-40.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-41.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-42.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-45.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-46.c     |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-6.c      |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-7.c      |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-8.c      |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_back_prop-9.c      |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-1.c        | 18 +++++------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-10.c       | 18 +++++------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-11.c       |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-12.c       | 18 +++++------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-13.c       | 24 +++++++--------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-14.c       | 24 +++++++--------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-15.c       |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-16.c       | 28 ++++++++---------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-17.c       | 20 ++++++-------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-18.c       | 20 ++++++-------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-19.c       |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-2.c        | 18 +++++------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-20.c       | 18 +++++------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-21.c       | 24 +++++++--------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-22.c       | 24 +++++++--------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-23.c       |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-24.c       | 28 ++++++++---------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-25.c       | 14 ++++-----
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-26.c       | 12 ++++----
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-27.c       | 12 ++++----
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-28.c       |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-3.c        |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-4.c        | 18 +++++------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-5.c        | 24 +++++++--------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-6.c        | 24 +++++++--------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-7.c        |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-8.c        | 28 ++++++++---------
>  .../riscv/rvv/vsetvl/vlmax_bb_prop-9.c        | 18 +++++------
>  .../riscv/rvv/vsetvl/vlmax_call-1.c           | 30 +++++++++----------
>  .../riscv/rvv/vsetvl/vlmax_call-2.c           | 28 ++++++++---------
>  .../riscv/rvv/vsetvl/vlmax_call-3.c           | 28 ++++++++---------
>  .../riscv/rvv/vsetvl/vlmax_call-4.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_complex_loop-2.c   |  8 ++---
>  .../riscv/rvv/vsetvl/vlmax_conflict-1.c       |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_conflict-11.c      |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_conflict-12.c      |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_conflict-2.c       |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_conflict-3.c       |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_conflict-4.c       |  8 ++---
>  .../riscv/rvv/vsetvl/vlmax_conflict-5.c       | 10 +++----
>  .../riscv/rvv/vsetvl/vlmax_conflict-6.c       |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_conflict-7.c       |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_conflict-8.c       |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-1.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-10.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-11.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-12.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-13.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-14.c  | 28 ++++++++---------
>  .../riscv/rvv/vsetvl/vlmax_miss_default-15.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-16.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-17.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-18.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-19.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-2.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-20.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-21.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-22.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-23.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-24.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-25.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-26.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-27.c  |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-28.c  | 28 ++++++++---------
>  .../riscv/rvv/vsetvl/vlmax_miss_default-3.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-4.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-5.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-6.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-7.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-8.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_miss_default-9.c   |  4 +--
>  .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-10.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-11.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-12.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-13.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-14.c           | 16 +++++-----
>  .../riscv/rvv/vsetvl/vlmax_phi-15.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-16.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-17.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-18.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-19.c           |  4 +--
>  .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-20.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-21.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-22.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-23.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-24.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-25.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-26.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-27.c           |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_phi-28.c           | 16 +++++-----
>  .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c |  4 +--
>  .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c |  4 +--
>  .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c |  4 +--
>  .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c |  4 +--
>  .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c |  4 +--
>  .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c |  4 +--
>  .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_single_block-1.c   | 14 ++++-----
>  .../riscv/rvv/vsetvl/vlmax_single_block-10.c  | 24 +++++++--------
>  .../riscv/rvv/vsetvl/vlmax_single_block-11.c  |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_single_block-12.c  | 18 +++++------
>  .../riscv/rvv/vsetvl/vlmax_single_block-13.c  | 14 ++++-----
>  .../riscv/rvv/vsetvl/vlmax_single_block-14.c  |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_single_block-15.c  |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_single_block-16.c  | 30 +++++++++----------
>  .../riscv/rvv/vsetvl/vlmax_single_block-17.c  | 18 +++++------
>  .../riscv/rvv/vsetvl/vlmax_single_block-18.c  |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_single_block-19.c  | 12 ++++----
>  .../riscv/rvv/vsetvl/vlmax_single_block-2.c   |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_single_block-3.c   |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_single_block-4.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_single_block-5.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_single_block-6.c   |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_single_block-7.c   |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_single_block-8.c   |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_single_block-9.c   | 30 +++++++++----------
>  .../riscv/rvv/vsetvl/vlmax_single_vtype-1.c   | 28 ++++++++---------
>  .../riscv/rvv/vsetvl/vlmax_single_vtype-2.c   | 12 ++++----
>  .../riscv/rvv/vsetvl/vlmax_single_vtype-3.c   |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_single_vtype-4.c   |  8 ++---
>  .../riscv/rvv/vsetvl/vlmax_single_vtype-5.c   |  8 ++---
>  .../riscv/rvv/vsetvl/vlmax_single_vtype-6.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_single_vtype-7.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_single_vtype-8.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-1.c   |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-10.c  |  6 ++--
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-12.c  |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-13.c  |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-14.c  |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-15.c  |  8 ++---
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-16.c  |  8 ++---
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-2.c   |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-4.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-5.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-6.c   |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-7.c   |  2 +-
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-8.c   |  4 +--
>  .../riscv/rvv/vsetvl/vlmax_switch_vtype-9.c   |  4 +--
>  182 files changed, 720 insertions(+), 720 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c
> index 47645ee7110..fbf451f3d4c 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c
> @@ -31,6 +31,6 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } }
> */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } }
> */
>  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts
> "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c
> index d36df955a43..ba289f24d23 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c
> @@ -54,6 +54,6 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond, int cond
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } }
> */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0"
> no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c
> index fa818aa3b1c..44e8a3f12f7 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c
> @@ -58,6 +58,6 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond, int cond
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } }
> */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0"
> no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c
> index 324e38d3fc6..a8f5af9f1fa 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c
> @@ -58,7 +58,7 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond, int cond
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0"
> no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c
> index 23d21557d03..31034bcfa25 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c
> @@ -58,7 +58,7 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond, int cond
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0"
> no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c
> index da48ce2f1f3..dececb45294 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c
> @@ -53,6 +53,6 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>      *(vint16mf4_t*)(out + i + 700) = v;
>    }
>  }
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c
> index 7dd931c9df8..161d14c2009 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c
> @@ -138,6 +138,6 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>      *(vint16mf4_t*)(out + i + 700) = v;
>    }
>  }
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0"  no-opts "-O1" no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c
> index dce21cc8dbc..1f3bae2342a 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c
> @@ -54,6 +54,6 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c
> index 18c44d6479d..33885e77ae9 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c
> @@ -52,7 +52,7 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c
> index 0c6a572671a..213c48a1b55 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c
> @@ -44,5 +44,5 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>  }
>
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } }
> */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 2 { target { no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target {
> no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } }
> */
>  /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c
> index 3e7d8f4030f..b8c2cc05f38 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c
> @@ -45,6 +45,6 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>      *(vint16mf4_t*)(out + i + 700) = v;
>    }
>  }
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } }
> */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } }
> */
>  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts
> "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c
> index dce21cc8dbc..1f3bae2342a 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c
> @@ -54,6 +54,6 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c
> index 7c2435ab726..b60a6527262 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c
> @@ -45,6 +45,6 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c
> index 222e0c6cbee..c4a04511f34 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c
> @@ -52,7 +52,7 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c
> index 1dd55cdbb0d..36a18a40536 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c
> @@ -35,7 +35,7 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c
> index 931bba5389d..b4d4240b8d4 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c
> @@ -35,7 +35,7 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c
> index 93015e0c5f5..4295ac3a2bb 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c
> @@ -91,6 +91,6 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 10 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 10 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 20 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c
> index adb831d3ee1..59e069f2149 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c
> @@ -84,6 +84,6 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 8 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 8 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 17 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c
> index 16a5f2d98fb..e148a1cc859 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c
> @@ -38,14 +38,14 @@ void f (void * restrict in, void * restrict out, void
> * restrict in2, void * res
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c
> index 366b5cf4925..e8340a63ee2 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c
> @@ -40,15 +40,15 @@ void f (void * restrict in, void * restrict out, void
> * restrict in2, void * res
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 10 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c
> index cbd7a8b1a6b..74584e7708b 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c
> @@ -40,15 +40,15 @@ void f (void * restrict in, void * restrict out, void
> * restrict in2, void * res
>    }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 11 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c
> index f6ac96fe900..63f6c72c60e 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c
> @@ -41,7 +41,7 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int n, int cond)
>      *(vint16mf4_t*)(out + i + 700) = v;
>    }
>  }
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0"  no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts
> "-O0"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */
>
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c
> index 3d800a1daef..92bf3abaec7 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c
> @@ -32,13 +32,13 @@ void f (void * restrict in, void * restrict out, void
> * restrict in2, void * res
>      }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>
>  /* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c
> index ad954f7c51c..4d254570e4d 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c
> @@ -33,14 +33,14 @@ void f (void * restrict in, void * restrict out, void
> * restrict in2, void * res
>  }
>
>  /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>
>  /* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c
> index aa4dac4e000..284df7245e7 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c
> @@ -32,15 +32,15 @@ void f (void * restrict in, void * restrict out, void
> * restrict in2, void * res
>      }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]:+}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]:+}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>
>  /* { dg-final { scan-assembler-times {vsetvli} 8 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
>
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c
> index 9cd9fa3c787..1057b1bc00b 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c
> @@ -32,14 +32,14 @@ void f (void * restrict in, void * restrict out, void
> * restrict in2, void * res
>      }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>
>  /* { dg-final { scan-assembler-times {vsetvli} 8 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c
> index ce4efe215c9..9746ebed18c 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c
> @@ -41,5 +41,5 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int32_t * restrict in2, i
>      }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c
> index defbd23c2d3..0547d622838 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c
> @@ -34,5 +34,5 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int32_t * restrict in2, i
>      }
>  }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts
> "-funroll-loops" no-opts "-g" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" } } } } */
>  /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts
> "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" }
> } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c
> index 466c95c4e91..a82b86f4d88 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c
> @@ -42,6 +42,6 @@ void f (int32_t * restrict in, int32_t * restrict out,
> int32_t * restrict in2, i
>      }
>  }
>
> -/* { dg-fina