From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vk1-xa2a.google.com (mail-vk1-xa2a.google.com [IPv6:2607:f8b0:4864:20::a2a]) by sourceware.org (Postfix) with ESMTPS id 7D53E3858CD1 for ; Wed, 31 May 2023 10:13:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7D53E3858CD1 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-vk1-xa2a.google.com with SMTP id 71dfb90a1353d-456fe3597bdso567123e0c.0 for ; Wed, 31 May 2023 03:13:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1685528003; x=1688120003; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=lHumpU3gOGGZ+prk+LT1F+YXVj1y+kGLKNkCBcDAkP8=; b=IuJKDPS3MWrO3MhP4mF/4QeDP1gzfiTL3AH1LbqoG9qcchAZ52ArRf1pp8zj60qg4B i8yV0lcqnHhv+L3FtkSDSdKxx9q/zv4o61Eb5KT8sGGWRUQPKONCke9NrC5l3bEu4KcM BbIft7SZjnAiSXP9fBfOkk2O6uD3msXQDd2+mPSgoh1RwuwE7Zh41C7s+gv7bixAT+kt tucLpMNuWqvbmN2V1+WbJ6rEdU7wU3vnjdychd676k/2Zo5CsqLE0tlWDfhbJlH4EXWs opIH3uTNjMIL5VI01W+UaKEJCMP3/XOlcLfXQspZ7ytP6WU1MU5IpZkdUjXNqv3X0NyI bJ6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685528003; x=1688120003; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=lHumpU3gOGGZ+prk+LT1F+YXVj1y+kGLKNkCBcDAkP8=; b=L6VyzXToDuJBHhj8l4KfcY75g+53uYax2aJUkCW9zQf23RvP1jWi7sDTx5YyAwNVWk LSCV9aNQV5oV89/3xfaXSjJD1HEBcyXeFGGZCathgIMu5INmJKcJgA4/BU2yn4kF4ILk vRf/RMiHOPcU5pkiF0PGaDfO1th3hbqBzxsRagsTVCoAkVN4+zoSi0vDKLBXZVLToQLo f/Hhsb3NS6VQVH32+kTe59yJKug9ciG+F5IVm9B0IoZZy1unMh/+eySiaBVOlKKzh0NU usqF7sSRxRXqw8pV2TmuUPJDDBxmxhJEx/0IkQNZN4geznY1VjYRAHpqJp34rBinxaUJ mDnQ== X-Gm-Message-State: AC+VfDx9o2v2HX+0x9/6wjLbM2cNChpwdhKbmxe6wHVu8V6hl/6Sbpxp DR8tnMlba+veUWUBmXa9xfLDy2XB+H093w9cXRg= X-Google-Smtp-Source: ACHHUZ7Ln/6Ln2ZlBNQ/qGa3bUN+RsKLcGjnqesEDEu7II15qnQKiflEczHcXcpwMim6+xymx4gsD1XDLS8m/XeAhOk= X-Received: by 2002:a05:6122:d27:b0:446:b903:d76c with SMTP id az39-20020a0561220d2700b00446b903d76cmr5820277vkb.5.1685528002406; Wed, 31 May 2023 03:13:22 -0700 (PDT) MIME-Version: 1.0 References: <20230512090443.34123-1-gaofei@eswincomputing.com> <20230512090443.34123-2-gaofei@eswincomputing.com> <20230530145831919731236@eswincomputing.com> In-Reply-To: <20230530145831919731236@eswincomputing.com> From: Kito Cheng Date: Wed, 31 May 2023 18:13:11 +0800 Message-ID: Subject: Re: Re: [PATCH 1/1] [V2] [RISC-V] support cm.push cm.pop cm.popret in zcmp To: Fei Gao Cc: gcc-patches , palmer , jeffreyalaw , "sinan.lin" , jiawei Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > >[1] https://patchwork.sourceware.org/project/gcc/patch/20230406062118.47431-5-jiawei@iscas.ac.cn/ > Thanks for your review. > > The md file looks verbose with bunch of *_offset_operand and stack_push_up_to_*_operand, but it significantly > simplies implementation of recognizing zmcp push and pop insns and outputting assembly. Also, the md file > clearly shows and checks the slot that each register is placed(different to slot order w/o save-restore before > zcmp is introduced). So I prefer my patch V2 to V1 or the link you attached. But ideas are welcome to make > it better. Appreciated if you suggest more details for the improvement. Got your point, and share an idea to simplify that: struct code_for_push_pop_t { insn_code (*push)(machine_mode); insn_code (*pop)(machine_mode); insn_code (*pop_ret)(machine_mode); }; const code_for_push_pop_t code_for_push_pop [/*ZCMP_MAX_GRP_SLOTS*/2] = { {code_for_gpr_multi_pop_up_to_ra, /*FIXME*/nullptr, /*FIXME*/nullptr}, {code_for_gpr_multi_pop_up_to_s0, /*FIXME*/nullptr, /*FIXME*/nullptr} }; static rtx riscv_gen_multi_push_pop_insn (op_idx op, HOST_WIDE_INT adj_size, unsigned int regs_num) { rtx stack_adj = GEN_INT (adj_size); return GEN_FCN (code_for_push_pop[regs_num].push(Pmode)) (stack_adj); } (define_mode_attr slot0_offset [(SI "0") (DI "0")]) (define_mode_attr slot1_offset [(SI "4") (DI "8")]) (define_insn "@gpr_multi_pop_up_to_ra" [(set (reg:X SP_REGNUM) (plus:X (reg:X SP_REGNUM) (match_operand 0 "stack_pop_up_to_ra_operand" "I"))) (set (reg:X RETURN_ADDR_REGNUM) (mem:X (plus:X (reg:X SP_REGNUM) (const_int ))))] "TARGET_ZCMP" "cm.pop {ra}, %0" ) (define_insn "@gpr_multi_pop_up_to_s0" [(set (reg:X SP_REGNUM) (plus:X (reg:X SP_REGNUM) (match_operand 0 "stack_pop_up_to_s0_operand" "I"))) (set (reg:X S0_REGNUM) (mem:X (plus:X (reg:X SP_REGNUM) (const_int )))) (set (reg:X RETURN_ADDR_REGNUM) (mem:X (plus:X (reg:X SP_REGNUM) (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0}, %0" ) > >> @@ -5620,7 +5977,7 @@ riscv_expand_epilogue (int style) > >> adjust)); > >> rtx dwarf = NULL_RTX; > >> rtx cfa_adjust_rtx = gen_rtx_PLUS (Pmode, stack_pointer_rtx, > >> - GEN_INT (step2)); > >> + GEN_INT (step2 + libcall_size + multipop_size)); > > > >Why we need `+ libcall_size` here? or...why we don't need that before? > It's a good catch:) > I should have added `+ libcall_size` in > https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=60524be1e3929d83e15fceac6e2aa053c8a6fb20 > > That's why I corrected the cfi issue in save-restore along with zcmp changes in this patch. I would like to have a separate patch to fix this bug instead of hidden in this patch.