From: Kito Cheng <kito.cheng@gmail.com>
To: pan2.li@intel.com
Cc: gcc-patches@gcc.gnu.org, juzhe.zhong@rivai.ai, yanzhang.wang@intel.com
Subject: Re: [PATCH v1] RISC-V: Bugfix for vls integer mode calling convention
Date: Mon, 29 Jan 2024 21:22:37 +0800 [thread overview]
Message-ID: <CA+yXCZDj+b=7HZhOjb3YxtJMn-UKVZKePcxW2r0EQoqyF9e6WQ@mail.gmail.com> (raw)
In-Reply-To: <20240124031601.2030670-1-pan2.li@intel.com>
> @@ -4868,6 +4968,63 @@ riscv_pass_fpr_pair (machine_mode mode, unsigned regno1,
> GEN_INT (offset2))));
> }
>
> +static rtx
> +riscv_pass_vls_aggregate_in_gpr_or_fpr (struct riscv_arg_info *info,
> + machine_mode mode, unsigned gpr_base,
> + unsigned fpr_base)
Tried a few more clang and GCC code gen and I found VLS vector is
always passed in
GPR, and never passed in FPR, so I think I should update psABI rather than fix
that on GCC side.
> @@ -4997,9 +5170,7 @@ riscv_get_arg_info (struct riscv_arg_info *info, const CUMULATIVE_ARGS *cum,
> info->gpr_offset = cum->num_gprs;
> info->fpr_offset = cum->num_fprs;
>
> - /* When disable vector_abi or scalable vector argument is anonymous, this
> - argument is passed by reference. */
> - if (riscv_v_ext_mode_p (mode) && (!riscv_vector_abi || !named))
> + if (riscv_mode_pass_by_reference_p (mode, named))
Keep as it is fine since riscv_vector_abi is gone.
> return NULL_RTX;
>
> if (named)
next prev parent reply other threads:[~2024-01-29 13:22 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-24 3:16 pan2.li
2024-01-24 3:18 ` juzhe.zhong
2024-01-24 3:41 ` Li, Pan2
2024-01-24 3:43 ` juzhe.zhong
2024-01-29 13:22 ` Kito Cheng [this message]
2024-01-30 8:39 ` Li, Pan2
2024-01-30 8:37 ` [PATCH v2] RISC-V: Bugfix for vls mode aggregated in GPR " pan2.li
2024-01-30 12:54 ` Kito Cheng
2024-01-30 13:10 ` Li, Pan2
2024-01-30 13:49 ` Li, Pan2
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