From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by sourceware.org (Postfix) with ESMTPS id 2ACEF3858D20 for ; Wed, 12 Jul 2023 07:11:14 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 2ACEF3858D20 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-51d95aed33aso7996619a12.3 for ; Wed, 12 Jul 2023 00:11:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; t=1689145873; x=1691737873; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=zAVgUna73uQqyIy1FRjk5wKFdXrxuqwSg6Tdq+A0otE=; b=ST9kOPrqEfEdk2RGKm4Afpdwobyk1tBEq40e1QgXhQLLBwyKBhpqmqQEpYqKrtu2Nr fiuQV1N0HKNgVCvp6XEKiOlVkeU+C1H/oGLaTHUWD00qmRSYa8m3XYH1ERsBhDeJ1ErH pys62KwDRUlvuKKygjNybNxGqKW+T0m4xP9gk4UDHtWI7a1UZTvGT/aBw8K7PbLloISH fzDko+iBqt1/jx1m8T+Y3t0fxXQv/pATQh+bkaSBYpXIsou2ure1tNib7kW01mXrw1tw Sb2x7tFvMD0ksH9JR4Bc1cpe8zYhxcL56oi4oZqmfv/qqhe9Ucuof/65OTpewkiNJp1V 6uQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689145873; x=1691737873; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=zAVgUna73uQqyIy1FRjk5wKFdXrxuqwSg6Tdq+A0otE=; b=Cv08H7qor9L4zCevk8JHQYSCewZhntPRtDWwQhddkGA10XEichQi4DprhRlecXMXYy WN90N3pTbWqxs1xWdg2uEIpykVX7tdkIM2XCepJ7N9vXyFmg+CO6uGHHJ13Hf99DAExb 3rlEgn4wiR0sNh2VkAM/WNlxUaQcbgQE1h/PObCiSyljoeW2/AtdkTCKVvY2qCNya3Gm TxCmdMiAHeO+vql3e/7e4l+5BnoHBTJAcjz+vHTw63EpPTV81FLvb4UJgGa6etHwZCTl 1B7trV1IbPfbAi9XN4hrfNuJ60FQ82EnBF4dhLe3rXOjaPcatQFQVHwQeVrBug9DemmY zxpg== X-Gm-Message-State: ABy/qLb6N5HDtDmds7DZEMmf7voKZFmXb5B1jIttVxITokfaFf50BisV KLQ5tgtA/0O8WZq7SfAMaf3dBqo344pWd0jRMBGVZw== X-Google-Smtp-Source: APBJJlEXYBxE3OwRCb7BuFlwKwM+PBh+6q77KkOcceno9gNJn5mXcZITDKeuTodwZjpV93LaAOC+Oczj48ggHkwdTck= X-Received: by 2002:aa7:c98a:0:b0:51e:3427:63ea with SMTP id c10-20020aa7c98a000000b0051e342763eamr14321811edt.8.1689145872661; Wed, 12 Jul 2023 00:11:12 -0700 (PDT) MIME-Version: 1.0 References: <20230711153949.6676-1-cooper.qu@linux.alibaba.com> In-Reply-To: From: Philipp Tomsich Date: Wed, 12 Jul 2023 09:11:01 +0200 Message-ID: Subject: Re: [PATCH 1/1] riscv: thead: Fix ICE when enable XTheadMemPair ISA extension. To: Kito Cheng Cc: =?UTF-8?Q?Christoph_M=C3=BCllner?= , Xianmiao Qu , gcc-patches@gcc.gnu.org, jeffreyalaw@gmail.com Content-Type: multipart/alternative; boundary="000000000000b6d396060044eb7c" X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,HTML_MESSAGE,JMQ_SPF_NEUTRAL,KAM_SHORT,LIKELY_SPAM_BODY,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE,WEIRD_PORT autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --000000000000b6d396060044eb7c Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Looks like I missed the OK on this one. I can pick it up today, unless you Kito already has it in flight? Thanks, Philipp. On Tue, 11 Jul 2023 at 17:51, Kito Cheng wrote: > Hi Christoph: > > Ooops, I thought Philipp will push those patches, does here any other > patches got approved but not committed? I can help to push those > patches tomorrow. > > On Tue, Jul 11, 2023 at 11:42=E2=80=AFPM Christoph M=C3=BCllner > wrote: > > > > Hi Cooper, > > > > I addressed this in April this year. > > It even got an "ok", but nobody pushed it: > > https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616972.html > > > > BR > > Christoph > > > > On Tue, Jul 11, 2023 at 5:39=E2=80=AFPM Xianmiao Qu > wrote: > > > > > > The frame related load/store instructions should not been > > > scheduled bewteen echo other, and the REG_FRAME_RELATED_EXPR > > > expression note should should be added to those instructions > > > to prevent this. > > > This bug cause ICE during GCC bootstap, and it will also ICE > > > in the simplified case mempair-4.c, compilation fails with: > > > during RTL pass: dwarf2 > > > theadmempair-4.c:20:1: internal compiler error: in > dwarf2out_frame_debug_cfa_offset, at dwarf2cfi.cc:1376 > > > 0xa8c017 dwarf2out_frame_debug_cfa_offset > > > ../../../gcc/gcc/dwarf2cfi.cc:1376 > > > 0xa8c017 dwarf2out_frame_debug > > > ../../../gcc/gcc/dwarf2cfi.cc:2285 > > > 0xa8c017 scan_insn_after > > > ../../../gcc/gcc/dwarf2cfi.cc:2726 > > > 0xa8cc97 scan_trace > > > ../../../gcc/gcc/dwarf2cfi.cc:2893 > > > 0xa8d84d create_cfi_notes > > > ../../../gcc/gcc/dwarf2cfi.cc:2933 > > > 0xa8d84d execute_dwarf2_frame > > > ../../../gcc/gcc/dwarf2cfi.cc:3309 > > > 0xa8d84d execute > > > ../../../gcc/gcc/dwarf2cfi.cc:3799 > > > > > > gcc/ChangeLog: > > > > > > * config/riscv/thead.cc (th_mempair_save_regs): Add > > > REG_FRAME_RELATED_EXPR note for mempair instuctions. > > > > > > gcc/testsuite/ChangeLog: > > > * gcc.target/riscv/xtheadmempair-4.c: New test. > > > --- > > > gcc/config/riscv/thead.cc | 6 +++-- > > > .../gcc.target/riscv/xtheadmempair-4.c | 26 +++++++++++++++++= ++ > > > 2 files changed, 30 insertions(+), 2 deletions(-) > > > create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadmempair-4.c > > > > > > diff --git a/gcc/config/riscv/thead.cc b/gcc/config/riscv/thead.cc > > > index 75203805310..2df709226f9 100644 > > > --- a/gcc/config/riscv/thead.cc > > > +++ b/gcc/config/riscv/thead.cc > > > @@ -366,10 +366,12 @@ th_mempair_save_regs (rtx operands[4]) > > > { > > > rtx set1 =3D gen_rtx_SET (operands[0], operands[1]); > > > rtx set2 =3D gen_rtx_SET (operands[2], operands[3]); > > > + rtx dwarf =3D gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (2)); > > > rtx insn =3D emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, > set1, set2))); > > > RTX_FRAME_RELATED_P (insn) =3D 1; > > > - add_reg_note (insn, REG_CFA_OFFSET, copy_rtx (set1)); > > > - add_reg_note (insn, REG_CFA_OFFSET, copy_rtx (set2)); > > > + XVECEXP (dwarf, 0, 0) =3D copy_rtx (set1); > > > + XVECEXP (dwarf, 0, 1) =3D copy_rtx (set2); > > > + add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf); > > > } > > > > > > /* Similar like riscv_restore_reg, but restores two registers from > memory > > > diff --git a/gcc/testsuite/gcc.target/riscv/xtheadmempair-4.c > b/gcc/testsuite/gcc.target/riscv/xtheadmempair-4.c > > > new file mode 100644 > > > index 00000000000..d653f056ef4 > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.target/riscv/xtheadmempair-4.c > > > @@ -0,0 +1,26 @@ > > > +/* { dg-do compile } */ > > > +/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-g" "-Oz" "-Os" "-flto" } > } */ > > > +/* { dg-options "-march=3Drv64gc_xtheadmempair -O2 -g > -mtune=3Dthead-c906" { target { rv64 } } } */ > > > +/* { dg-options "-march=3Drv32gc_xtheadmempair -O2 -g > -mtune=3Dthead-c906" { target { rv32 } } } */ > > > + > > > +void a(); > > > +void b(char *); > > > +void m_fn1(int); > > > +int e; > > > + > > > +int foo(int ee, int f, int g) { > > > + char *h =3D (char *)__builtin_alloca(1); > > > + b(h); > > > + b(""); > > > + int i =3D ee; > > > + e =3D g; > > > + m_fn1(f); > > > + a(); > > > + e =3D i; > > > +} > > > + > > > +/* { dg-final { scan-assembler-times "th.ldd\t" 3 { target { rv64 } } > } } */ > > > +/* { dg-final { scan-assembler-times "th.sdd\t" 3 { target { rv64 } } > } } */ > > > + > > > +/* { dg-final { scan-assembler-times "th.lwd\t" 3 { target { rv32 } } > } } */ > > > +/* { dg-final { scan-assembler-times "th.swd\t" 3 { target { rv32 } } > } } */ > > > -- > > > 2.17.1 > > > > --000000000000b6d396060044eb7c--