From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by sourceware.org (Postfix) with ESMTPS id 058FB3858C56 for ; Thu, 16 Jun 2022 09:32:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 058FB3858C56 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-wr1-x432.google.com with SMTP id g4so1059187wrh.11 for ; Thu, 16 Jun 2022 02:32:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=hfg2YooE7nvpeARUcv02kD89NnznhGz5NdDScFQBdkU=; b=BRaortPHcozvkBaaVXB2JFgD3W+LepD9DJAjMXgwj7B4snPlWwJRYUv59yMqx8VhTO 0DGSFD6gYETaDOcFIFLf8DN8OUUPlKSsgW084I2tEnSS39SAoIb4b+StBSrdGqNWXRdb Z3U2GysE3yt5Dz7fVKNLpWr5maIOsdgtbn+60Ip6WtzJpBVLgnEQEhYLj/qTQWBE9fp7 s46gR7fT6R1Mcw4Y0vnqLDQOh+LAincT0IhITz21JlP/XINVc3wpC4h/DQbwl31Z5Bts moC3+Y8s5ILgqIeBevDwgovkY/GV4X6ePPTf1vq/DhyyJSB2ZcOG0LY9JosPMhjW52ze oTFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=hfg2YooE7nvpeARUcv02kD89NnznhGz5NdDScFQBdkU=; b=RmETKHWc1QkV4xpzN7yUmxXCWvyV5DKFmDZ+qlaJ16I8IKvJcVWZsADA3LeGDJyVl9 EQfsOgy9BSUk1ERSWpf/mVeksRdtN9D0ohkdr3DTwzvxRAKQR+uUjBipIpN7ySquUDPq NZLgn8yj1/LvDpS8t51hZDyszogKAULosYCDrhTwkEZaqYJT8Q5xidVkOvdpUPytBJ6Y zpAca+bPsimaKQ6GMriYYGqYXYjxJAagknU6aosBMGudb6qBxd25kt927Tj2MFcfLK6H zdcVMAcj093R87ogzZs5QYBWW+IwF9mh1hqJXEftgK/d/7uqt27c2A3Uls0sWyGWk19q IcNw== X-Gm-Message-State: AJIora9NSOx+Gz60ivQnj5Xrw9RJ+w49e45Me2DNS77sC/OLj2IeP+4C B0tdYPKOWwl2fCOgSpIMZcpYPQiHFJKm6GbtzBBpORrSDxlV0YL4 X-Google-Smtp-Source: AGRyM1v0A28c1Vo5vzxsbLCG3Bq8Q/dBNY0KVzs5orHZLysub+DJU4LQbyEupq2TlYIV944DAHHWUOEJ/4xlX1bfjWU= X-Received: by 2002:adf:d1ca:0:b0:218:47e1:ab0b with SMTP id b10-20020adfd1ca000000b0021847e1ab0bmr3835716wrd.90.1655371930712; Thu, 16 Jun 2022 02:32:10 -0700 (PDT) MIME-Version: 1.0 References: <20220524225156.4026293-1-philipp.tomsich@vrull.eu> In-Reply-To: <20220524225156.4026293-1-philipp.tomsich@vrull.eu> From: Philipp Tomsich Date: Thu, 16 Jun 2022 11:31:59 +0200 Message-ID: Subject: Re: [PATCH v1 1/3] RISC-V: Split "(a & (1 << BIT_NO)) ? 0 : -1" to bexti + addi To: gcc-patches@gcc.gnu.org Cc: Andrew Waterman , Palmer Dabbelt , Kito Cheng , Manolis Tsamis , Vineet Gupta , Christoph Muellner Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Jun 2022 09:32:17 -0000 Kito, Looks like this series fell by the wayside (possibly, because it didn't have a cover-letter and was easier to miss)? Thanks, Philipp. On Wed, 25 May 2022 at 00:52, Philipp Tomsich wrote: > > Consider creating a polarity-reversed mask from a set-bit (i.e., if > the bit is set, produce all-ones; otherwise: all-zeros). Using Zbb, > this can be expressed as bexti, followed by an addi of minus-one. To > enable the combiner to discover this opportunity, we need to split the > canonical expression for "(a & (1 << BIT_NO)) ? 0 : -1" into a form > combinable into bexti. > > Consider the function: > long f(long a) > { > return (a & (1 << BIT_NO)) ? 0 : -1; > } > This produces the following sequence prior to this change: > andi a0,a0,16 > seqz a0,a0 > neg a0,a0 > ret > Following this change, it results in: > bexti a0,a0,4 > addi a0,a0,-1 > ret > > Signed-off-by: Philipp Tomsich > > gcc/ChangeLog: > > * config/riscv/bitmanip.md: Add a splitter to generate > polarity-reversed masks from a set bit using bexti + addi. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/zbs-bexti.c: New test. > > --- > > gcc/config/riscv/bitmanip.md | 13 +++++++++++++ > gcc/testsuite/gcc.target/riscv/zbs-bexti.c | 14 ++++++++++++++ > 2 files changed, 27 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bexti.c > > diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md > index 0ab9ffe3c0b..ea5dea13cfb 100644 > --- a/gcc/config/riscv/bitmanip.md > +++ b/gcc/config/riscv/bitmanip.md > @@ -340,3 +340,16 @@ (define_insn "*bexti" > "TARGET_ZBS" > "bexti\t%0,%1,%2" > [(set_attr "type" "bitmanip")]) > + > +;; We can create a polarity-reversed mask (i.e. bit N -> { set = 0, clear = -1 }) > +;; using a bext(i) followed by an addi instruction. > +;; This splits the canonical representation of "(a & (1 << BIT_NO)) ? 0 : -1". > +(define_split > + [(set (match_operand:GPR 0 "register_operand") > + (neg:GPR (eq:GPR (zero_extract:GPR (match_operand:GPR 1 "register_operand") > + (const_int 1) > + (match_operand 2)) > + (const_int 0))))] > + "TARGET_ZBS" > + [(set (match_dup 0) (zero_extract:GPR (match_dup 1) (const_int 1) (match_dup 2))) > + (set (match_dup 0) (plus:GPR (match_dup 0) (const_int -1)))]) > diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bexti.c b/gcc/testsuite/gcc.target/riscv/zbs-bexti.c > new file mode 100644 > index 00000000000..99e3b58309c > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/zbs-bexti.c > @@ -0,0 +1,14 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv64gc_zbs -mabi=lp64 -O2" } */ > + > +/* bexti */ > +#define BIT_NO 4 > + > +long > +foo0 (long a) > +{ > + return (a & (1 << BIT_NO)) ? 0 : -1; > +} > + > +/* { dg-final { scan-assembler "bexti" } } */ > +/* { dg-final { scan-assembler "addi" } } */ > -- > 2.34.1 >