From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by sourceware.org (Postfix) with ESMTPS id 96D593858D33 for ; Wed, 1 Mar 2023 19:56:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 96D593858D33 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-ed1-x536.google.com with SMTP id eg37so58461944edb.12 for ; Wed, 01 Mar 2023 11:56:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=N3NbsCmepaAg8F7/E66wkIJTRpX3mI8wkHH5/uyhxtU=; b=C3W/BKvqYC6hqC4D9LA0sRtjxmuqL4BjzYOeugEm3VBEeXExDs0MHwLUIr3x5tLmt1 /hw9UDd+9kRGQLHcQJfJE0Go3U1cWQX7B5S73+SCakpHAelIarH42N+iqns5HWr00I+B nbyweatO2NY/O9Z8OYrfcLtCEqOCig63cHXhYu4jmkpBfYeloCKUHUHDlkgfnPN0P9pJ 6BoT6Dw5AGeLjxLgsEW6TJwVpnr6PQYw9HxhmCzLaUVk1Sn/bBNpeInsT8reChvMrWWW R4QHY2Kcief3KUkXkFTzdKRfPeErj2DeDZzPS71qrY3PaIDLivcmws6zN2IQk9gX2Bfi kGWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=N3NbsCmepaAg8F7/E66wkIJTRpX3mI8wkHH5/uyhxtU=; b=uPMxi8hoK26PAOm56D4nDNRguiEooxY8pISKQXRjWaP3zJ5Hzup0aE7GmWUdeCymNs VM4el7zvULwfa8MfHuIdDfgGPKmiOVdd7Ijl5Mv/Apgji4r8l3xgYGmi76atE2bqjLaw n455v3nDmBD7a0y4nI5+HPN/9on6Ul8NZuGbb67DD3Ues2ebsB3/SCU5fC1u13gdc602 a5YJ2wPf7a1+SPMIEMTTNghS781/MCaX8fADBZUXOaFj8LsRXkZ/WJLaX7w9d6dBPZ/Z 5/DRFzUIK3x8TP0UG3qSuTibFNTWClgBrSzoetP4JH4Hs3NLaAgjA7xLG5IFrYtctBgU v+Yg== X-Gm-Message-State: AO0yUKU5uiOSntB0mm7AxZumuFEXzEWhKyWZ9VqUpGAH2PGYB+ER3wdF bxQSnsI6ve0wE6YEtLEA8ywvSuw+KVnwVKLNeFLT1Q== X-Google-Smtp-Source: AK7set8dBT3Z9eIMhABT8vEkg4vgANNLHGcBTQCiQy8Q8+ock4Q0jSs2uRjYIVRkI7uefz0o/P0ASdbad5wxWiqxXFU= X-Received: by 2002:a17:907:7648:b0:8b1:7e1b:5ec1 with SMTP id kj8-20020a170907764800b008b17e1b5ec1mr3933951ejc.6.1677700593357; Wed, 01 Mar 2023 11:56:33 -0800 (PST) MIME-Version: 1.0 References: <20230301195315.1793087-1-vineetg@rivosinc.com> In-Reply-To: <20230301195315.1793087-1-vineetg@rivosinc.com> From: Philipp Tomsich Date: Wed, 1 Mar 2023 20:56:22 +0100 Message-ID: Subject: Re: [PATCH] RISC-V: costs: miscomputed shiftadd_cost triggering synth_mult [PR/108987] To: Vineet Gupta Cc: gcc-patches@gcc.gnu.org, kito.cheng@gmail.com, Palmer Dabbelt , Christoph Mullner , Jeff Law , gnu-toolchain@rivosinc.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,JMQ_SPF_NEUTRAL,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, 1 Mar 2023 at 20:53, Vineet Gupta wrote: > > This showed up as dynamic icount regression in SPEC 531.deepsjeng with upstream > gcc (vs. gcc 12.2). gcc was resorting to synthetic multiply using shift+add(s) > even when multiply had clear cost benefit. > > |00000000000133b8 : > | 133b8: srl a3,a1,s6 > | 133bc: and a3,a3,s5 > | 133c0: slli a4,a3,0x9 > | 133c4: add a4,a4,a3 > | 133c6: slli a4,a4,0x9 > | 133c8: add a4,a4,a3 > | 133ca: slli a3,a4,0x1b > | 133ce: add a4,a4,a3 > > vs. gcc 12 doing something lke below. > > |00000000000131c4 : > | 131c4: ld s1,8(sp) > | 131c6: srl a3,a1,s4 > | 131ca: and a3,a3,s11 > | 131ce: mul a3,a3,s1 > > Bisected this to f90cb39235c4 ("RISC-V: costs: support shift-and-add in > strength-reduction"). The intent was to optimize cost for > shift-add-pow2-{1,2,3} corresponding to bitmanip insns SH*ADD, but ended > up doing that for all shift values which seems to favor synthezing > multiply among others. > > The bug itself is trivial, IN_RANGE() calling pow2p_hwi() which returns bool > vs. exact_log2() returning power of 2. > > This fix also requires update to the test introduced by the same commit > which now generates MUL vs. synthesizing it. > > gcc/Changelog: > > * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to > use exact_log2(). > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/zba-shNadd-07.c: f2(i*783) now generates MUL vs. > 5 insn sh1add+slli+add+slli+sub. > * gcc.target/riscv/pr108987.c: New test. > > Signed-off-by: Vineet Gupta Reviewed-by: Philipp Tomsich