From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lj1-x232.google.com (mail-lj1-x232.google.com [IPv6:2a00:1450:4864:20::232]) by sourceware.org (Postfix) with ESMTPS id 546713858004 for ; Fri, 18 Nov 2022 00:08:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 546713858004 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-lj1-x232.google.com with SMTP id b9so4832181ljr.5 for ; Thu, 17 Nov 2022 16:08:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=5OmNVVLJIyeRBvW6NeCiY8AzSIKlz5MyC7nX1QR3em4=; b=k20926W9IOC8OCJEqTIATqKFY1yK+aUuVsGNH0eQHBCgBSfa0LB+DMD6pbLUmUNvZu zCbJNmmkwq5TuEhGsFxCVJ6HeKnxv6U6MEYLj0DYPvMuI4mvcJv3cNijNgF5zboV8l7t g6iX4CvnaIGdda0YZu6CU3QfUu9szXt9SrE3Z/dM/YwkiprNHSMCM9QeZBsLmYYjMQj0 cIgWimgdg4lm4xzSd7bIJPcS523OeBPv5JEcbXJOpvuBfdJv/stmw7JRSHEb48oZd393 4Ap5zO7AsPBSX8krdbNP1bXZBnxQetUH9RzR83PwTNoEPiFqZdGpD3jDpF1DsVF1Wy95 itWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5OmNVVLJIyeRBvW6NeCiY8AzSIKlz5MyC7nX1QR3em4=; b=GTEstuuSks5hPHMvsR8vJV+oKufTrTzxENNWJ+ruzI7Xb2oAGqWGfxjVvTuw5JOle+ U0hY9SpAMbOxo+zPccqTpED1YBP796thsGzvr7txn9BkudL1EOcmH53v0DQEBM+60rwQ MZEVdjuaR+qA3OBxPLDIXzYPYShCZARtjGwSznJOk+mRNbVLUSOD58dsxEPWdeI4ySJ+ Na5lET++giaXGbQKTLGseQFVdURlOkfhpLDt1sRvvF1sIoVJqBuE5G0kMTp/QEBdHSgE 2abQYCdYIB28/3aELWdMvrUkbVRUUwaH187UE2I1sDkdo7SlEAjKO7OvFMxCm4KxHvce DPrA== X-Gm-Message-State: ANoB5pkcN0SgdhQBXMZ5l0MunYDQjp7fnhnk9jdppFIsIVPto1WMRd4H HyQHCMWGNQkA2HuZ3Sf7SnhCh9lSJLzzleQYdkMC5w== X-Google-Smtp-Source: AA0mqf6vDTUKdFtIRNcfyXSzxDwAa07wFtzuVtFKCAT/rfY0z1BIEZz9oNLTWnfXpSFRdzCBZWBB+U7FNQr4BIcDz+4= X-Received: by 2002:a2e:9f47:0:b0:277:1273:f3b8 with SMTP id v7-20020a2e9f47000000b002771273f3b8mr1673213ljk.178.1668730106756; Thu, 17 Nov 2022 16:08:26 -0800 (PST) MIME-Version: 1.0 References: <20221112212943.3068249-1-philipp.tomsich@vrull.eu> <20221112212943.3068249-5-philipp.tomsich@vrull.eu> In-Reply-To: From: Philipp Tomsich Date: Fri, 18 Nov 2022 01:08:15 +0100 Message-ID: Subject: Re: [PATCH 4/7] RISC-V: Recognize sign-extract + and cases for XVentanaCondOps To: Jeff Law Cc: gcc-patches@gcc.gnu.org, Vineet Gupta , Palmer Dabbelt , Christoph Muellner , Kito Cheng , Jeff Law Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,JMQ_SPF_NEUTRAL,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, 18 Nov 2022 at 00:41, Jeff Law wrote: > > > On 11/12/22 14:29, Philipp Tomsich wrote: > > Users might use explicit arithmetic operations to create a mask and > > then and it, in a sequence like > > cond =3D (bits >> SHIFT) & 1; > > mask =3D ~(cond - 1); > > val &=3D mask; > > which will present as a single-bit sign-extract. > > > > Dependening on what combination of XVentanaCondOps and Zbs are > > available, this will map to the following sequences: > > - bexti + vt.maskc, if both Zbs and XVentanaCondOps are present > > - andi + vt.maskc, if only XVentanaCondOps is available and the > > sign-extract is operating on bits 10:0 (bit > > 11 can't be reached, as the immediate is > > sign-extended) > > - slli + srli + and, otherwise. > > > > gcc/ChangeLog: > > > > * config/riscv/xventanacondops.md: Recognize SIGN_EXTRACT > > of a single-bit followed by AND for XVentanaCondOps. > > > > Signed-off-by: Philipp Tomsich > > --- > > > > gcc/config/riscv/xventanacondops.md | 46 ++++++++++++++++++++++++++++= + > > 1 file changed, 46 insertions(+) > > > > diff --git a/gcc/config/riscv/xventanacondops.md b/gcc/config/riscv/xve= ntanacondops.md > > index 7930ef1d837..3e9d5833a4b 100644 > > --- a/gcc/config/riscv/xventanacondops.md > > +++ b/gcc/config/riscv/xventanacondops.md > > @@ -73,3 +73,49 @@ > > "TARGET_XVENTANACONDOPS" > > [(set (match_dup 5) (match_dup 1)) > > (set (match_dup 0) (and:X (neg:X (ne:X (match_dup 5) (const_int 0)= )) > > + > > +;; Users might use explicit arithmetic operations to create a mask and > > +;; then and it, in a sequence like > > Nit. Seems like a word is missing. "make and then and it"?? > > > Do we really care about TARGET_XVENTANACONDOPS && ! TARGET_ZBS? While Ventana might not plan to have this combination, nothing prevents someone to implement only a single one of these =E2=80=94 just as users might choose to override the -march string. Also note that (the proposed) ZiCondOps will share most of its infrastructure with XVentanaCondOps, we will have the same situation there. > If there's a good reason to care about the !TARGET_ZBS case, then OK > with the nit fixed. If we agree that the !TARGET_ZBS case isn't all > that important, then obviously OK with that pattern removed too. > > I'm about out of oomph today. I may take a look at 7/7 tonight though. > Given it hits target independent code we probably want to get resolution > on that patch sooner rather than later. > > jeff >