Hi Richard, Following from off-list discussion, in the attached patch, I wrote pattern similar to vec_duplicate_reg, which seems to work for the svld1rq tests. Does it look OK ? Sorry, I didn't fully understand your suggestion on integrating with vec_duplicate_reg pattern. For vec_duplicate_reg, the operand to vec_duplicate expects mode to be , while the pattern in patch expects operand of vec_duplicate to have mode . How do we write a pattern so an operand can accept either of the 2 modes ? Also it seems cannot be used with SVE_ALL ? Thanks, Prathamesh