From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by sourceware.org (Postfix) with ESMTPS id D70B038930FB for ; Mon, 21 Jun 2021 08:33:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D70B038930FB Received: by mail-ed1-x533.google.com with SMTP id m14so1049979edp.9 for ; Mon, 21 Jun 2021 01:33:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=GydYXEShLhkaJG85rGF5AOFBkfyp/wTLbjO69xxkxFU=; b=Hv3dPOoNdo6q+RVjQFZwS3DNtaqONzWBm7fhPfLk4ckJ38KZtnniWpgg5n31+rsmmj AqcsK9gunyAmM/yJj3KaYUi7g6Q61JqijpAYoFRVM0cUnUhd3B12YDX4L2ErHAiDLZR4 Q3JysN7zR7NYQzsKVdR5vWDxnbmyGfn22GDRzZmX6I27oW3New/QQtYpkIZgWlnSwfhr TJw0fOv+KuB4XaYg0mrzkFi0inQkXYXO4pVFVeiBzq9w+O8Ldbnda4lDk/7QvcUOz3Pf PQKVXSY3RCNq3OFn1aq29kZ1MiTdTvii4k2jN/qUkl2J3ufX9j6qdQXVaHHHTLkDkwYk zQ8g== X-Gm-Message-State: AOAM531lF17L5RL7JFq2etdC+SHF0qcrKJkN9oAnEaS/1cG9RWZlOZTm DUBuQQ/qBZzZj9LyRVarTdSwRbYplZ8CW/vTYXd5xw== X-Google-Smtp-Source: ABdhPJzlEIMb75FhkgjpEpSYXowlzHSydzLfvjzJJq5YiG541hgWMzpmqb3au7JnV6Sx1IY8cqrJiCG+LNrGy1Rqhys= X-Received: by 2002:a05:6402:b76:: with SMTP id cb22mr19998837edb.112.1624264406757; Mon, 21 Jun 2021 01:33:26 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Prathamesh Kulkarni Date: Mon, 21 Jun 2021 14:02:50 +0530 Message-ID: Subject: Re: [ARM] PR97906 - Missed lowering abs(a) >= abs(b) to vacge To: Kyrylo Tkachov Cc: gcc Patches Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 21 Jun 2021 08:33:29 -0000 On Wed, 16 Jun 2021 at 15:49, Prathamesh Kulkarni wrote: > > On Mon, 14 Jun 2021 at 16:15, Kyrylo Tkachov wrote: > > > > > > > > > -----Original Message----- > > > From: Prathamesh Kulkarni > > > Sent: 14 June 2021 08:58 > > > To: gcc Patches ; Kyrylo Tkachov > > > > > > Subject: Re: [ARM] PR97906 - Missed lowering abs(a) >= abs(b) to vacge > > > > > > On Mon, 7 Jun 2021 at 12:46, Prathamesh Kulkarni > > > wrote: > > > > > > > > On Tue, 1 Jun 2021 at 16:03, Prathamesh Kulkarni > > > > wrote: > > > > > > > > > > Hi, > > > > > As mentioned in PR, for following test-case: > > > > > > > > > > #include > > > > > > > > > > uint32x2_t f1(float32x2_t a, float32x2_t b) > > > > > { > > > > > return vabs_f32 (a) >= vabs_f32 (b); > > > > > } > > > > > > > > > > uint32x2_t f2(float32x2_t a, float32x2_t b) > > > > > { > > > > > return (uint32x2_t) __builtin_neon_vcagev2sf (a, b); > > > > > } > > > > > > > > > > We generate vacge for f2, but with -ffast-math, we generate following > > > for f1: > > > > > f1: > > > > > vabs.f32 d1, d1 > > > > > vabs.f32 d0, d0 > > > > > vcge.f32 d0, d0, d1 > > > > > bx lr > > > > > > > > > > This happens because, the middle-end inverts the comparison to b <= a, > > > > > .optimized dump: > > > > > _8 = __builtin_neon_vabsv2sf (a_4(D)); > > > > > _7 = __builtin_neon_vabsv2sf (b_5(D)); > > > > > _1 = _7 <= _8; > > > > > _2 = VIEW_CONVERT_EXPR(_1); > > > > > _6 = VIEW_CONVERT_EXPR(_2); > > > > > return _6; > > > > > > > > > > and combine fails to match the following pattern: > > > > > (set (reg:V2SI 121) > > > > > (neg:V2SI (le:V2SI (abs:V2SF (reg:V2SF 123)) > > > > > (abs:V2SF (reg:V2SF 122))))) > > > > > > > > > > because neon_vca pattern has GTGE code iterator. > > > > > The attached patch adjusts the neon_vca patterns to use GLTE instead > > > > > similar to neon_vca_fp16insn, and removes > > > NEON_VACMP iterator. > > > > > Code-gen with patch: > > > > > f1: > > > > > vacle.f32 d0, d1, d0 > > > > > bx lr > > > > > > > > > > Bootstrapped + tested on arm-linux-gnueabihf and cross-tested on arm*- > > > *-*. > > > > > OK to commit ? > > > > Is that inversion guaranteed to happen (is it a canonicalization rule)? > I think it follows the following rule for canonicalization from > tree_swap_operands_p: > /* It is preferable to swap two SSA_NAME to ensure a canonical form > for commutative and comparison operators. Ensuring a canonical > form allows the optimizers to find additional redundancies without > having to explicitly check for both orderings. */ > if (TREE_CODE (arg0) == SSA_NAME > && TREE_CODE (arg1) == SSA_NAME > && SSA_NAME_VERSION (arg0) > SSA_NAME_VERSION (arg1)) > return 1; > > For the above test-case, it's ccp1 that inverts the comparison. > The input to ccp1 pass is: > _12 = __builtin_neon_vabsv2sf (a_6(D)); > _14 = _12; > _1 = _14; > _11 = __builtin_neon_vabsv2sf (b_8(D)); > _16 = _11; > _2 = _16; > _3 = _1 >= _2; > _4 = VEC_COND_EXPR <_3, { -1, -1 }, { 0, 0 }>; > _10 = VIEW_CONVERT_EXPR(_4); > return _10; > > _3 = _1 >= _2 is folded into: > _3 = _12 >= _11 > > Since _12 is higher ssa version than _11, it is canonicalized to: > _3 = _11 <= _12. > Hi Kyrill, Is it OK to push given the above canonicalization ? Thanks, Prathamesh > Thanks, > Prathamesh > > If so, ok. > > Thanks, > > Kyrill > > > > > > > > > > Thanks, > > > Prathamesh > > > > > > > > Thanks, > > > > Prathamesh > > > > > > > > > > Thanks, > > > > > Prathamesh