From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by sourceware.org (Postfix) with ESMTPS id A5E443858D32 for ; Tue, 19 Sep 2023 05:56:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A5E443858D32 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linaro.org Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-401d80f4ef8so58143085e9.1 for ; Mon, 18 Sep 2023 22:56:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1695102964; x=1695707764; darn=gcc.gnu.org; h=to:subject:message-id:date:from:in-reply-to:references:mime-version :from:to:cc:subject:date:message-id:reply-to; bh=xAq/BnEQWqTt4K6lMiAyIqznEtP3OWYdsZmBEV17kcI=; b=iSb7Mh4d9JVdzhWex8ue9kp1Qy9w3GA9vXJ+Ga+UVyplf++d6r5Zx7V73hO2Zqa7jm 5WWmvFt5MpXQObkW0qgXxMfCZhCg8so27Oo/ORdNyFIGx2KfXaK2RmVmpDue/QG/TR47 L8QV1tROKAqiL31Ver4c4NY0yyRloNI6ra5CSNFDcBL2CCsMqcKcIQucjMdIE7Ms40hu cJCHttcRQiSqwH5fqSiTp9XknRc61FgUDP3jToJAVbh0elfWUC84kSM8Ii+bTd2ScKMF 5Qowe51OD1SnbyU8RgHeGE+M/g7r2u2cbOhBIT1Whx+7dY97mfVsiem0HkI39goWbkMn xllA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695102964; x=1695707764; h=to:subject:message-id:date:from:in-reply-to:references:mime-version :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=xAq/BnEQWqTt4K6lMiAyIqznEtP3OWYdsZmBEV17kcI=; b=vx0E180Uz6ezWpLLpi5fmWAWGl7PIW8khKhfCHGd6UxkomkxIEGcz6SCI7WKvRdlQ+ Cpug1j3QT1RQUE29TGxG5JvJQo4Zkp0sMnsRvbxvrFWiY82RZ1cb77ca3AsZ4Fww/5Wn wrj5NmL1L9Rg6PMRMCMZwNMoGQoMTIkNOE0Se5Ett0+bkqd3tPFz1ln5RlTJ8UE8aMFP CiVTuHeAumsKtl6IrouSz0b0sI3NHp0LOLfl7LzkwfDVe7mFPhO7ey7Oz/wSsy3fMNTU Pfs82lZD2kldzw+UKFPhLXG9UGpysXUxPTnh/Mrsj7qePfPeNeAizvkzqiX5VcwhnwD8 nk5Q== X-Gm-Message-State: AOJu0YyBg0nRQxJxxCSR2yPW7dewDRYfhZjaCa1JaJJ8Q6KAlOtn73lB WUZGR75KLDcIIftvGH3VEawDNlw+NqkWVI/ihyKBBg== X-Google-Smtp-Source: AGHT+IG953CYweEzJD8227d+inH8EqywwsFpHv8lzTflY4hedenNW2PQD02kWNLSc/Q2QzJyW5YGhwlRJpgOewKgaSg= X-Received: by 2002:a5d:40d0:0:b0:31f:ec06:20f with SMTP id b16-20020a5d40d0000000b0031fec06020fmr10439693wrq.14.1695102964344; Mon, 18 Sep 2023 22:56:04 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Prathamesh Kulkarni Date: Tue, 19 Sep 2023 11:25:27 +0530 Message-ID: Subject: Re: [AArch64][testsuite] Adjust vect_copy_lane_1.c for new code-gen To: Prathamesh Kulkarni , Adhemerval Zanella , gcc Patches , richard.sandiford@arm.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Sun, 17 Sept 2023 at 20:11, Richard Sandiford wrote: > > Prathamesh Kulkarni writes: > > Hi, > > After 27de9aa152141e7f3ee66372647d0f2cd94c4b90, there's a following regression: > > FAIL: gcc.target/aarch64/vect_copy_lane_1.c scan-assembler-times > > ins\\tv0.s\\[1\\], v1.s\\[0\\] 3 > > > > This happens because for the following function from vect_copy_lane_1.c: > > float32x2_t > > __attribute__((noinline, noclone)) test_copy_lane_f32 (float32x2_t a, > > float32x2_t b) > > { > > return vcopy_lane_f32 (a, 1, b, 0); > > } > > > > Before 27de9aa152141e7f3ee66372647d0f2cd94c4b90, > > it got lowered to following sequence in .optimized dump: > > [local count: 1073741824]: > > _4 = BIT_FIELD_REF ; > > __a_5 = BIT_INSERT_EXPR ; > > return __a_5; > > > > The above commit simplifies BIT_FIELD_REF + BIT_INSERT_EXPR > > to vector permutation and now thus gets lowered to: > > > > [local count: 1073741824]: > > __a_4 = VEC_PERM_EXPR ; > > return __a_4; > > > > Since we give higher priority to aarch64_evpc_zip over aarch64_evpc_ins > > in aarch64_expand_vec_perm_const_1, it now generates: > > > > test_copy_lane_f32: > > zip1 v0.2s, v0.2s, v1.2s > > ret > > > > Similarly for test_copy_lane_[us]32. > > Yeah, I suppose this choice is at least as good as INS. It has the advantage > that the source and destination don't need to be tied. For example: > > int32x2_t f(int32x2_t a, int32x2_t b, int32x2_t c) { > return vcopy_lane_s32 (b, 1, c, 0); > } > > used to be: > > f: > mov v0.8b, v1.8b > ins v0.s[1], v2.s[0] > ret > > but is now: > > f: > zip1 v0.2s, v1.2s, v2.2s > ret > > > The attached patch adjusts the tests to reflect the change in code-gen > > and the tests pass. > > OK to commit ? > > > > Thanks, > > Prathamesh > > > > diff --git a/gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c b/gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c > > index 2848be564d5..811dc678b92 100644 > > --- a/gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c > > +++ b/gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c > > @@ -22,7 +22,7 @@ BUILD_TEST (uint16x4_t, uint16x4_t, , , u16, 3, 2) > > BUILD_TEST (float32x2_t, float32x2_t, , , f32, 1, 0) > > BUILD_TEST (int32x2_t, int32x2_t, , , s32, 1, 0) > > BUILD_TEST (uint32x2_t, uint32x2_t, , , u32, 1, 0) > > -/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[1\\\], v1.s\\\[0\\\]" 3 } } */ > > +/* { dg-final { scan-assembler-times "zip1\\tv0.2s, v0.2s, v1.2s" 3 } } */ > > BUILD_TEST (int64x1_t, int64x1_t, , , s64, 0, 0) > > BUILD_TEST (uint64x1_t, uint64x1_t, , , u64, 0, 0) > > BUILD_TEST (float64x1_t, float64x1_t, , , f64, 0, 0) > > OK, thanks. Thanks, committed to trunk in 98c25cfc79a21886de7342fb563c4eb3c3d5f4e9. Thanks, Prathamesh > > Richard