From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oa1-x2a.google.com (mail-oa1-x2a.google.com [IPv6:2001:4860:4864:20::2a]) by sourceware.org (Postfix) with ESMTPS id A97B63858C53 for ; Thu, 9 Nov 2023 08:38:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A97B63858C53 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org A97B63858C53 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2001:4860:4864:20::2a ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699519110; cv=none; b=HO0jtWKB5RbaakePl4/HN4AnzaPDUeHxYfzv2z+cZcTEgarnhzFz+wqO+eJTaFNGpCnfItU3+lwy/pDHiNJqX+ItBpLrFnAX2gPdsYlRwfbERLOlM1tCQFkMKHp+E6LWUQL97v9xr7xVu0M+z7/XkCjv5qwc91hydLzq1EYEPGI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699519110; c=relaxed/simple; bh=mZseBPEHPEB+zyNXqm3Vn2Ia+RV/o+O05Q1P3n9MqsA=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=xfiLrVJW9ZDDvCNQvq1/lAzPOKl+I9w+Oi8Ra+VvOCX3ZtXjO1ws7sx23de+eFkYYdmufLkTji8WThWGg4LuIpDqVW1LqQO8ehBlL9Vu1zHPKI6AGuo6glLEvZGzlbatGXnoagVzmHDPhVsMI3ZLAHhCE3STmYCh9eZ5vfMqEB4= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-oa1-x2a.google.com with SMTP id 586e51a60fabf-1f04c5ed8d7so337972fac.1 for ; Thu, 09 Nov 2023 00:38:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699519107; x=1700123907; darn=gcc.gnu.org; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=GcYhHL22aWYDeid/fq9pH58SDaFS68v0j2VRdZZV3R4=; b=aqf608vKE7qVYdZcZlVGjWyHXPkKKe6uF2ym4OZPaQESFJRSBlVTmyDTzEfjMfrubS zZoWgPx3ANOs8K9fJawKfbN07/aPs3T5Nsac5fAUCATOqaJJOaJfZQxRVRSyr+YrbwZn 9SiJTr+eFNIGNwHzrNrVwfpmRVgr6TLc8Wq81iBanT175Vu9mJN62pSDZU6RVx8TXiaJ Z6VHpqMV11tdwHRbolByZ7vA5fA/vP9Q6mTHUEdeDtsspGYPl7AXBa1T36L3opAg1bBe NrQnFF/OIskAb5BI/3N9vrtcwzCQL9oLmM0DVi3tmGNw0be6Bp5S6ZcpNdqviTK6KXuA Dbxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699519107; x=1700123907; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=GcYhHL22aWYDeid/fq9pH58SDaFS68v0j2VRdZZV3R4=; b=WKtIhCGKR1VI2AXunrAMejirpaqBUJCqxYyXBbmLlcH5sPsdu+JY97aQR+kf9z8jqa tz/o40uE/EYUH2amy6atWsdnpZvTPjyzGqPSGwHHrUV0pCqg6q2unNUZOxSrB6vozkiK fTzDgAQCdCKq3gPMjtNhGc+ETtUCuoLquDpVf+Esd77eowEZJITH7U/tzNv3DLT/a3ww iP80N6v6dekwEpcwPRYgzX2RCyUeknp4aOkoX3p1LsH2Q9dm/4Hq2GdBxMk+1PHdIECZ z6tyvdW/G019K7dDoleALY+KuvyOTbS3v8zceebe2Ewk40ZPRtUgB3cePKz/4zPgU51i GZGg== X-Gm-Message-State: AOJu0YwIBjVNk8ZpW6RrGLLeJ8V/75uktqCQ2rUrnXo96yQbbY4PVTrv a5+HPur9EpXCaua/Xe6NJozJM2OBYp3AcJ05zLAZM0Wv77k97stwjmh2RA== X-Google-Smtp-Source: AGHT+IGW0astWHsyVqwgnzjmgMbtH8IRp62uhhRwdbQiNSDPWGqlCh+SiO6oaPUFDKZqZfPyblW0y+T/X5gzTvk7z0k= X-Received: by 2002:a05:6871:3a22:b0:1ef:bfd8:90d1 with SMTP id pu34-20020a0568713a2200b001efbfd890d1mr5475636oac.22.1699519106491; Thu, 09 Nov 2023 00:38:26 -0800 (PST) MIME-Version: 1.0 References: <20231108131237.3672914-1-chenyixuan@iscas.ac.cn> In-Reply-To: From: Yixuan Chen Date: Thu, 9 Nov 2023 16:38:15 +0800 Message-ID: Subject: Re: [PATCH] minimal support for xtheadv To: =?UTF-8?Q?Christoph_M=C3=BCllner?= Cc: Kito Cheng , chenyixuan@iscas.ac.cn, gcc-patches@gcc.gnu.org, shiyulong@iscas.ac.cn, shihua@iscas.ac.cn, jiawei@iscas.ac.cn, Jojo R , Philipp Tomsich , Cooper Qu Content-Type: multipart/alternative; boundary="000000000000a1a9330609b4200d" X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,FREEMAIL_REPLY,GIT_PATCH_0,HTML_MESSAGE,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --000000000000a1a9330609b4200d Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Kito and Christoph, XYenChi (oriachiaun@gmail.com) is my e-mail address too. I didn't notice the git email config have changed, very sorry about that. We want to support other operate system project from our team, so port the XTheadV. If T-Head and VRULL have made great progress, it's pleasure to follow your work. By the way, I have sent the opcode patch to binutils, if you have any concern, please check the patch: https://sourceware.org/pipermail/binutils/2023-November/130431.html If our team could provide any help, please let us know. Best regards Yixuan Christoph M=C3=BCllner =E4=BA=8E2023=E5=B9=B4= 11=E6=9C=889=E6=97=A5=E5=91=A8=E5=9B=9B 16:06=E5=86=99=E9=81=93=EF=BC=9A > On Thu, Nov 9, 2023 at 8:39=E2=80=AFAM Kito Cheng = wrote: > > > > Hi Yi Xuan: > > > > This patch is trivial, and generally LGTM, but I would require putting > > the spec into > https://github.com/riscv-non-isa/riscv-toolchain-conventions > > before merging this, also don't forget include "RISC-V:" in the title, > > it would be easier to track during the RISC-V GCC sync meeting :) > > > > And I am a little bit confused by the author's info? is it from you or > > "XYenChi "? or oriachiuan@gmail.com is also your > > mail address? > > > > cc Christoph since I believe you may know more about that process. > > cc JoJo since you are T-head folk :P > > Hi Yi Xuan and Kito, > > I was not aware that CAS is working on getting T-Head's Vector > extension supported. > My biggest concern with this patch is that "XTheadV" does not have a > specification. > > T-Head and VRULL are currently working on support patches for T-Head's > Vector extension > implementation. We've named the extension XTheadVector. > Supporting XTheadVector means to address a range of issues (e.g. > defining a formal ISA > vendor extension specification, extension discovery, addressing > implementation details, > differences among available cores, intrinsics, ...). > We've already made good progress on that and expect to publish first > results soon. > > BR > Christoph > > > > > > > On Wed, Nov 8, 2023 at 9:13=E2=80=AFPM wrote: > > > > > > From: XYenChi > > > > > > This patch is for support xtheadv. > > > > > > gcc/ChangeLog: > > > > > > 2023-11-08 Chen Yixuan > > > > > > * common/config/riscv/riscv-common.cc: Add xthead minimal > support. > > > > > > gcc/config/ChangeLog: > > > > > > 2023-11-08 Chen Yixuan > > > > > > * riscv/riscv.opt: Add xthead minimal support. > > > --- > > > gcc/common/config/riscv/riscv-common.cc | 2 ++ > > > gcc/config/riscv/riscv.opt | 2 ++ > > > 2 files changed, 4 insertions(+) > > > > > > diff --git a/gcc/common/config/riscv/riscv-common.cc > b/gcc/common/config/riscv/riscv-common.cc > > > index 526dbb7603b..d5ea0ee9b70 100644 > > > --- a/gcc/common/config/riscv/riscv-common.cc > > > +++ b/gcc/common/config/riscv/riscv-common.cc > > > @@ -325,6 +325,7 @@ static const struct riscv_ext_version > riscv_ext_version_table[] =3D > > > {"xtheadmemidx", ISA_SPEC_CLASS_NONE, 1, 0}, > > > {"xtheadmempair", ISA_SPEC_CLASS_NONE, 1, 0}, > > > {"xtheadsync", ISA_SPEC_CLASS_NONE, 1, 0}, > > > + {"xtheadv", ISA_SPEC_CLASS_NONE, 0, 7}, > > > > > > {"xventanacondops", ISA_SPEC_CLASS_NONE, 1, 0}, > > > > > > @@ -1680,6 +1681,7 @@ static const riscv_ext_flag_table_t > riscv_ext_flag_table[] =3D > > > {"xtheadmemidx", &gcc_options::x_riscv_xthead_subext, > MASK_XTHEADMEMIDX}, > > > {"xtheadmempair", &gcc_options::x_riscv_xthead_subext, > MASK_XTHEADMEMPAIR}, > > > {"xtheadsync", &gcc_options::x_riscv_xthead_subext, > MASK_XTHEADSYNC}, > > > + {"xtheadv", &gcc_options::x_riscv_xthead_subext, > MASK_XTHEADV}, > > > > > > {"xventanacondops", &gcc_options::x_riscv_xventana_subext, > MASK_XVENTANACONDOPS}, > > > > > > diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt > > > index 70d78151cee..2bbdf680fa2 100644 > > > --- a/gcc/config/riscv/riscv.opt > > > +++ b/gcc/config/riscv/riscv.opt > > > @@ -438,6 +438,8 @@ Mask(XTHEADMEMPAIR) Var(riscv_xthead_subext) > > > > > > Mask(XTHEADSYNC) Var(riscv_xthead_subext) > > > > > > +Mask(XTHEADV) Var(riscv_xthead_subext) > > > + > > > TargetVariable > > > int riscv_xventana_subext > > > > > > -- > > > 2.42.0 > > > > --000000000000a1a9330609b4200d--