From: Jim Wilson <jim.wilson@linaro.org>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Jim Wilson <jim.wilson@linaro.org>, Jim Wilson <wilson@tuliptree.org>
Subject: Re: [PATCH, AArch64] Disable reg offset in quad-word store for Falkor.
Date: Fri, 22 Sep 2017 15:59:00 -0000 [thread overview]
Message-ID: <CABXYE2WyDADSL_eDPKDKMj8iJcRQt9K-TbpXc7rVdKeVHp1rrg@mail.gmail.com> (raw)
In-Reply-To: <1506095357-3334-1-git-send-email-jim.wilson@linaro.org>
On Fri, Sep 22, 2017 at 8:49 AM, Jim Wilson <jim.wilson@linaro.org> wrote:
> On Falkor, because of an idiosyncracy of how the pipelines are designed, a
> quad-word store using a reg+reg addressing mode is almost twice as slow as an
> add followed by a quad-word store with a single reg addressing mode. So we
> get better performance if we disallow addressing modes using register offsets
> with quad-word stores.
This was tested with a bootstrap and make check of course. Also,
gcc.c-torture/compile/20021212-1.c compiled with -O3 -mcpu=falkor
makes a nice testcase to demonstrate that the patch works.
OK?
Jim
next prev parent reply other threads:[~2017-09-22 15:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-22 15:49 Jim Wilson
2017-09-22 15:59 ` Jim Wilson [this message]
2017-09-22 17:59 ` Andrew Pinski
2017-09-22 18:39 ` Jim Wilson
2017-09-22 21:11 ` Andrew Pinski
2017-10-12 21:54 ` Jim Wilson
2017-10-31 3:40 ` Kugan Vivekanandarajah
2017-10-31 16:18 ` Jim Wilson
2017-11-01 22:59 ` Kugan Vivekanandarajah
2017-09-22 20:06 Wilco Dijkstra
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