From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31848 invoked by alias); 6 Jun 2012 11:53:22 -0000 Received: (qmail 31836 invoked by uid 22791); 6 Jun 2012 11:53:17 -0000 X-SWARE-Spam-Status: No, hits=-2.7 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_YE,TW_IW,TW_SR X-Spam-Check-By: sourceware.org Received: from mail-wi0-f173.google.com (HELO mail-wi0-f173.google.com) (209.85.212.173) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 06 Jun 2012 11:53:00 +0000 Received: by wibhj6 with SMTP id hj6so4112853wib.8 for ; Wed, 06 Jun 2012 04:52:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding:x-gm-message-state; bh=VceTzmtfWTDZPDcD+amZiV1D5Pu/QkZL2/b+wlmmApg=; b=b2TFCTZ1n8K3tKNYpKURjtGX9QnQ+Qt8tiD0QxTQt2TTjj+8/GFfvocl+NY6UICN8l N/jRB0b/JryJjhglP2V9v4lCjC8m1TIPRP3+848oAUFEZPeDt2Cp7Hoy9glArQ9PGlqM ZaUBYJVr+5txMynur+tvXY+0ONjQYLKyMgc42dpfve0Mki1msg4zkCJwkJjT+YD9bkWe pZhV0Rh75tZ0NKD/MTF+H1m7UorVamYxRlyPWjv9pu61ELL0qp6LsvsKKJjS/6PUXmm9 dfgUG/4xOf8Q8NU2WXNrlHojXpF1xyYNiAckSw16su9SUYd+5EdqqYpTgtAwiK3Kx0RJ /cxg== MIME-Version: 1.0 Received: by 10.216.145.97 with SMTP id o75mr17162864wej.7.1338983578879; Wed, 06 Jun 2012 04:52:58 -0700 (PDT) Received: by 10.216.132.97 with HTTP; Wed, 6 Jun 2012 04:52:58 -0700 (PDT) In-Reply-To: <1338264799-12374-4-git-send-email-mattst88@gmail.com> References: <1338264799-12374-1-git-send-email-mattst88@gmail.com> <1338264799-12374-4-git-send-email-mattst88@gmail.com> Date: Wed, 06 Jun 2012 11:55:00 -0000 Message-ID: Subject: Re: [PATCH ARM iWMMXt 3/5] built in define and expand From: Ramana Radhakrishnan To: Matt Turner Cc: gcc-patches@gcc.gnu.org, Ramana Radhakrishnan , Richard Earnshaw , Nick Clifton , Paul Brook , Xinyu Qi Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-Gm-Message-State: ALoCoQlcdOZR4WNM2+iPI1Ymxo7qrUfNqglGx+0omr6kTLtMhTAXm+VvzzLkG6ASmjWsMiPjN88t X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2012-06/txt/msg00363.txt.bz2 On 29 May 2012 05:13, Matt Turner wrote: > From: Xinyu Qi > > =A0 =A0 =A0 =A0gcc/ > =A0 =A0 =A0 =A0* config/arm/arm.c (enum arm_builtins): Revise built-in fc= ode. > =A0 =A0 =A0 =A0(IWMMXT2_BUILTIN): New define. > =A0 =A0 =A0 =A0(IWMMXT2_BUILTIN2): Likewise. > =A0 =A0 =A0 =A0(iwmmx2_mbuiltin): Likewise. > =A0 =A0 =A0 =A0(builtin_description bdesc_2arg): Revise built in declarat= ion. > =A0 =A0 =A0 =A0(builtin_description bdesc_1arg): Likewise. > =A0 =A0 =A0 =A0(arm_init_iwmmxt_builtins): Revise built in initialization. > =A0 =A0 =A0 =A0(arm_expand_builtin): Revise built in expansion. > --- > =A0gcc/config/arm/arm.c | =A0620 ++++++++++++++++++++++++++++++++++++++++= +++++----- > =A01 files changed, 559 insertions(+), 61 deletions(-) > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index b0680ab..51eed40 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -19637,8 +19637,15 @@ static neon_builtin_datum neon_builtin_data[] =3D > =A0 =A0FIXME? =A0*/ > =A0enum arm_builtins > =A0{ > - =A0ARM_BUILTIN_GETWCX, > - =A0ARM_BUILTIN_SETWCX, > + =A0ARM_BUILTIN_GETWCGR0, > + =A0ARM_BUILTIN_GETWCGR1, > + =A0ARM_BUILTIN_GETWCGR2, > + =A0ARM_BUILTIN_GETWCGR3, > + > + =A0ARM_BUILTIN_SETWCGR0, > + =A0ARM_BUILTIN_SETWCGR1, > + =A0ARM_BUILTIN_SETWCGR2, > + =A0ARM_BUILTIN_SETWCGR3, > > =A0 ARM_BUILTIN_WZERO, > > @@ -19661,7 +19668,11 @@ enum arm_builtins > =A0 ARM_BUILTIN_WSADH, > =A0 ARM_BUILTIN_WSADHZ, > > - =A0ARM_BUILTIN_WALIGN, > + =A0ARM_BUILTIN_WALIGNI, > + =A0ARM_BUILTIN_WALIGNR0, > + =A0ARM_BUILTIN_WALIGNR1, > + =A0ARM_BUILTIN_WALIGNR2, > + =A0ARM_BUILTIN_WALIGNR3, > > =A0 ARM_BUILTIN_TMIA, > =A0 ARM_BUILTIN_TMIAPH, > @@ -19797,6 +19808,81 @@ enum arm_builtins > =A0 ARM_BUILTIN_WUNPCKELUH, > =A0 ARM_BUILTIN_WUNPCKELUW, > > + =A0ARM_BUILTIN_WABSB, > + =A0ARM_BUILTIN_WABSH, > + =A0ARM_BUILTIN_WABSW, > + > + =A0ARM_BUILTIN_WADDSUBHX, > + =A0ARM_BUILTIN_WSUBADDHX, > + > + =A0ARM_BUILTIN_WABSDIFFB, > + =A0ARM_BUILTIN_WABSDIFFH, > + =A0ARM_BUILTIN_WABSDIFFW, > + > + =A0ARM_BUILTIN_WADDCH, > + =A0ARM_BUILTIN_WADDCW, > + > + =A0ARM_BUILTIN_WAVG4, > + =A0ARM_BUILTIN_WAVG4R, > + > + =A0ARM_BUILTIN_WMADDSX, > + =A0ARM_BUILTIN_WMADDUX, > + > + =A0ARM_BUILTIN_WMADDSN, > + =A0ARM_BUILTIN_WMADDUN, > + > + =A0ARM_BUILTIN_WMULWSM, > + =A0ARM_BUILTIN_WMULWUM, > + > + =A0ARM_BUILTIN_WMULWSMR, > + =A0ARM_BUILTIN_WMULWUMR, > + > + =A0ARM_BUILTIN_WMULWL, > + > + =A0ARM_BUILTIN_WMULSMR, > + =A0ARM_BUILTIN_WMULUMR, > + > + =A0ARM_BUILTIN_WQMULM, > + =A0ARM_BUILTIN_WQMULMR, > + > + =A0ARM_BUILTIN_WQMULWM, > + =A0ARM_BUILTIN_WQMULWMR, > + > + =A0ARM_BUILTIN_WADDBHUSM, > + =A0ARM_BUILTIN_WADDBHUSL, > + > + =A0ARM_BUILTIN_WQMIABB, > + =A0ARM_BUILTIN_WQMIABT, > + =A0ARM_BUILTIN_WQMIATB, > + =A0ARM_BUILTIN_WQMIATT, > + > + =A0ARM_BUILTIN_WQMIABBN, > + =A0ARM_BUILTIN_WQMIABTN, > + =A0ARM_BUILTIN_WQMIATBN, > + =A0ARM_BUILTIN_WQMIATTN, > + > + =A0ARM_BUILTIN_WMIABB, > + =A0ARM_BUILTIN_WMIABT, > + =A0ARM_BUILTIN_WMIATB, > + =A0ARM_BUILTIN_WMIATT, > + > + =A0ARM_BUILTIN_WMIABBN, > + =A0ARM_BUILTIN_WMIABTN, > + =A0ARM_BUILTIN_WMIATBN, > + =A0ARM_BUILTIN_WMIATTN, > + > + =A0ARM_BUILTIN_WMIAWBB, > + =A0ARM_BUILTIN_WMIAWBT, > + =A0ARM_BUILTIN_WMIAWTB, > + =A0ARM_BUILTIN_WMIAWTT, > + > + =A0ARM_BUILTIN_WMIAWBBN, > + =A0ARM_BUILTIN_WMIAWBTN, > + =A0ARM_BUILTIN_WMIAWTBN, > + =A0ARM_BUILTIN_WMIAWTTN, > + > + =A0ARM_BUILTIN_WMERGE, > + > =A0 ARM_BUILTIN_THREAD_POINTER, > > =A0 ARM_BUILTIN_NEON_BASE, > @@ -20329,6 +20415,10 @@ static const struct builtin_description bdesc_2a= rg[] =3D > =A0 { FL_IWMMXT, CODE_FOR_##code, "__builtin_arm_" string, \ > =A0 =A0 ARM_BUILTIN_##builtin, UNKNOWN, 0 }, > > +#define IWMMXT2_BUILTIN(code, string, builtin) \ > + =A0{ FL_IWMMXT2, CODE_FOR_##code, "__builtin_arm_" string, \ > + =A0 =A0ARM_BUILTIN_##builtin, UNKNOWN, 0 }, > + > =A0 IWMMXT_BUILTIN (addv8qi3, "waddb", WADDB) > =A0 IWMMXT_BUILTIN (addv4hi3, "waddh", WADDH) > =A0 IWMMXT_BUILTIN (addv2si3, "waddw", WADDW) > @@ -20385,44 +20475,45 @@ static const struct builtin_description bdesc_2= arg[] =3D > =A0 IWMMXT_BUILTIN (iwmmxt_wunpckihb, "wunpckihb", WUNPCKIHB) > =A0 IWMMXT_BUILTIN (iwmmxt_wunpckihh, "wunpckihh", WUNPCKIHH) > =A0 IWMMXT_BUILTIN (iwmmxt_wunpckihw, "wunpckihw", WUNPCKIHW) > - =A0IWMMXT_BUILTIN (iwmmxt_wmadds, "wmadds", WMADDS) > - =A0IWMMXT_BUILTIN (iwmmxt_wmaddu, "wmaddu", WMADDU) > + =A0IWMMXT2_BUILTIN (iwmmxt_waddsubhx, "waddsubhx", WADDSUBHX) > + =A0IWMMXT2_BUILTIN (iwmmxt_wsubaddhx, "wsubaddhx", WSUBADDHX) > + =A0IWMMXT2_BUILTIN (iwmmxt_wabsdiffb, "wabsdiffb", WABSDIFFB) > + =A0IWMMXT2_BUILTIN (iwmmxt_wabsdiffh, "wabsdiffh", WABSDIFFH) > + =A0IWMMXT2_BUILTIN (iwmmxt_wabsdiffw, "wabsdiffw", WABSDIFFW) > + =A0IWMMXT2_BUILTIN (iwmmxt_avg4, "wavg4", WAVG4) > + =A0IWMMXT2_BUILTIN (iwmmxt_avg4r, "wavg4r", WAVG4R) > + =A0IWMMXT2_BUILTIN (iwmmxt_wmulwsm, "wmulwsm", WMULWSM) > + =A0IWMMXT2_BUILTIN (iwmmxt_wmulwum, "wmulwum", WMULWUM) > + =A0IWMMXT2_BUILTIN (iwmmxt_wmulwsmr, "wmulwsmr", WMULWSMR) > + =A0IWMMXT2_BUILTIN (iwmmxt_wmulwumr, "wmulwumr", WMULWUMR) > + =A0IWMMXT2_BUILTIN (iwmmxt_wmulwl, "wmulwl", WMULWL) > + =A0IWMMXT2_BUILTIN (iwmmxt_wmulsmr, "wmulsmr", WMULSMR) > + =A0IWMMXT2_BUILTIN (iwmmxt_wmulumr, "wmulumr", WMULUMR) > + =A0IWMMXT2_BUILTIN (iwmmxt_wqmulm, "wqmulm", WQMULM) > + =A0IWMMXT2_BUILTIN (iwmmxt_wqmulmr, "wqmulmr", WQMULMR) > + =A0IWMMXT2_BUILTIN (iwmmxt_wqmulwm, "wqmulwm", WQMULWM) > + =A0IWMMXT2_BUILTIN (iwmmxt_wqmulwmr, "wqmulwmr", WQMULWMR) > + =A0IWMMXT_BUILTIN (iwmmxt_walignr0, "walignr0", WALIGNR0) > + =A0IWMMXT_BUILTIN (iwmmxt_walignr1, "walignr1", WALIGNR1) > + =A0IWMMXT_BUILTIN (iwmmxt_walignr2, "walignr2", WALIGNR2) > + =A0IWMMXT_BUILTIN (iwmmxt_walignr3, "walignr3", WALIGNR3) > > =A0#define IWMMXT_BUILTIN2(code, builtin) \ > =A0 { FL_IWMMXT, CODE_FOR_##code, NULL, ARM_BUILTIN_##builtin, UNKNOWN, 0= }, > > +#define IWMMXT2_BUILTIN2(code, builtin) \ > + =A0{ FL_IWMMXT2, CODE_FOR_##code, NULL, ARM_BUILTIN_##builtin, UNKNOWN,= 0 }, > + > + =A0IWMMXT2_BUILTIN2 (iwmmxt_waddbhusm, WADDBHUSM) > + =A0IWMMXT2_BUILTIN2 (iwmmxt_waddbhusl, WADDBHUSL) > =A0 IWMMXT_BUILTIN2 (iwmmxt_wpackhss, WPACKHSS) > =A0 IWMMXT_BUILTIN2 (iwmmxt_wpackwss, WPACKWSS) > =A0 IWMMXT_BUILTIN2 (iwmmxt_wpackdss, WPACKDSS) > =A0 IWMMXT_BUILTIN2 (iwmmxt_wpackhus, WPACKHUS) > =A0 IWMMXT_BUILTIN2 (iwmmxt_wpackwus, WPACKWUS) > =A0 IWMMXT_BUILTIN2 (iwmmxt_wpackdus, WPACKDUS) > - =A0IWMMXT_BUILTIN2 (ashlv4hi3_di, =A0 =A0WSLLH) > - =A0IWMMXT_BUILTIN2 (ashlv4hi3_iwmmxt, WSLLHI) > - =A0IWMMXT_BUILTIN2 (ashlv2si3_di, =A0 =A0WSLLW) > - =A0IWMMXT_BUILTIN2 (ashlv2si3_iwmmxt, WSLLWI) > - =A0IWMMXT_BUILTIN2 (ashldi3_di, =A0 =A0 =A0WSLLD) > - =A0IWMMXT_BUILTIN2 (ashldi3_iwmmxt, =A0WSLLDI) > - =A0IWMMXT_BUILTIN2 (lshrv4hi3_di, =A0 =A0WSRLH) > - =A0IWMMXT_BUILTIN2 (lshrv4hi3_iwmmxt, WSRLHI) > - =A0IWMMXT_BUILTIN2 (lshrv2si3_di, =A0 =A0WSRLW) > - =A0IWMMXT_BUILTIN2 (lshrv2si3_iwmmxt, WSRLWI) > - =A0IWMMXT_BUILTIN2 (lshrdi3_di, =A0 =A0 =A0WSRLD) > - =A0IWMMXT_BUILTIN2 (lshrdi3_iwmmxt, =A0WSRLDI) > - =A0IWMMXT_BUILTIN2 (ashrv4hi3_di, =A0 =A0WSRAH) > - =A0IWMMXT_BUILTIN2 (ashrv4hi3_iwmmxt, WSRAHI) > - =A0IWMMXT_BUILTIN2 (ashrv2si3_di, =A0 =A0WSRAW) > - =A0IWMMXT_BUILTIN2 (ashrv2si3_iwmmxt, WSRAWI) > - =A0IWMMXT_BUILTIN2 (ashrdi3_di, =A0 =A0 =A0WSRAD) > - =A0IWMMXT_BUILTIN2 (ashrdi3_iwmmxt, =A0WSRADI) > - =A0IWMMXT_BUILTIN2 (rorv4hi3_di, =A0 =A0 WRORH) > - =A0IWMMXT_BUILTIN2 (rorv4hi3, =A0 =A0 =A0 =A0WRORHI) > - =A0IWMMXT_BUILTIN2 (rorv2si3_di, =A0 =A0 WRORW) > - =A0IWMMXT_BUILTIN2 (rorv2si3, =A0 =A0 =A0 =A0WRORWI) > - =A0IWMMXT_BUILTIN2 (rordi3_di, =A0 =A0 =A0 WRORD) > - =A0IWMMXT_BUILTIN2 (rordi3, =A0 =A0 =A0 =A0 =A0WRORDI) > - =A0IWMMXT_BUILTIN2 (iwmmxt_wmacuz, =A0 WMACUZ) > - =A0IWMMXT_BUILTIN2 (iwmmxt_wmacsz, =A0 WMACSZ) > + =A0IWMMXT_BUILTIN2 (iwmmxt_wmacuz, WMACUZ) > + =A0IWMMXT_BUILTIN2 (iwmmxt_wmacsz, WMACSZ) > =A0}; > > =A0static const struct builtin_description bdesc_1arg[] =3D > @@ -20445,6 +20536,12 @@ static const struct builtin_description bdesc_1a= rg[] =3D > =A0 IWMMXT_BUILTIN (iwmmxt_wunpckelsb, "wunpckelsb", WUNPCKELSB) > =A0 IWMMXT_BUILTIN (iwmmxt_wunpckelsh, "wunpckelsh", WUNPCKELSH) > =A0 IWMMXT_BUILTIN (iwmmxt_wunpckelsw, "wunpckelsw", WUNPCKELSW) > + =A0IWMMXT2_BUILTIN (iwmmxt_wabsv8qi3, "wabsb", WABSB) > + =A0IWMMXT2_BUILTIN (iwmmxt_wabsv4hi3, "wabsh", WABSH) > + =A0IWMMXT2_BUILTIN (iwmmxt_wabsv2si3, "wabsw", WABSW) > + =A0IWMMXT_BUILTIN (tbcstv8qi, "tbcstb", TBCSTB) > + =A0IWMMXT_BUILTIN (tbcstv4hi, "tbcsth", TBCSTH) > + =A0IWMMXT_BUILTIN (tbcstv2si, "tbcstw", TBCSTW) > =A0}; > > =A0/* Set up all the iWMMXt builtins. =A0This is not called if > @@ -20460,9 +20557,6 @@ arm_init_iwmmxt_builtins (void) > =A0 tree V4HI_type_node =3D build_vector_type_for_mode (intHI_type_node, = V4HImode); > =A0 tree V8QI_type_node =3D build_vector_type_for_mode (intQI_type_node, = V8QImode); > > - =A0tree int_ftype_int > - =A0 =A0=3D build_function_type_list (integer_type_node, > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 integer_typ= e_node, NULL_TREE); > =A0 tree v8qi_ftype_v8qi_v8qi_int > =A0 =A0 =3D build_function_type_list (V8QI_type_node, > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V8QI_type_= node, V8QI_type_node, > @@ -20524,6 +20618,9 @@ arm_init_iwmmxt_builtins (void) > =A0 tree v4hi_ftype_v2si_v2si > =A0 =A0 =3D build_function_type_list (V4HI_type_node, > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V2SI_type_= node, V2SI_type_node, NULL_TREE); > + =A0tree v8qi_ftype_v4hi_v8qi > + =A0 =A0=3D build_function_type_list (V8QI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 V4HI_type_n= ode, V8QI_type_node, NULL_TREE); > =A0 tree v2si_ftype_v4hi_v4hi > =A0 =A0 =3D build_function_type_list (V2SI_type_node, > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V4HI_type_= node, V4HI_type_node, NULL_TREE); > @@ -20538,12 +20635,10 @@ arm_init_iwmmxt_builtins (void) > =A0 =A0 =3D build_function_type_list (V2SI_type_node, > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V2SI_type_= node, long_long_integer_type_node, > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0NULL_TREE); > - =A0tree void_ftype_int_int > - =A0 =A0=3D build_function_type_list (void_type_node, > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 integer_typ= e_node, integer_type_node, > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 NULL_TREE); > =A0 tree di_ftype_void > =A0 =A0 =3D build_function_type_list (long_long_unsigned_type_node, NULL_= TREE); > + =A0tree int_ftype_void > + =A0 =A0=3D build_function_type_list (integer_type_node, NULL_TREE); > =A0 tree di_ftype_v8qi > =A0 =A0 =3D build_function_type_list (long_long_integer_type_node, > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V8QI_type_= node, NULL_TREE); > @@ -20559,6 +20654,15 @@ arm_init_iwmmxt_builtins (void) > =A0 tree v4hi_ftype_v8qi > =A0 =A0 =3D build_function_type_list (V4HI_type_node, > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V8QI_type_= node, NULL_TREE); > + =A0tree v8qi_ftype_v8qi > + =A0 =A0=3D build_function_type_list (V8QI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 V8QI_type_n= ode, NULL_TREE); > + =A0tree v4hi_ftype_v4hi > + =A0 =A0=3D build_function_type_list (V4HI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 V4HI_type_n= ode, NULL_TREE); > + =A0tree v2si_ftype_v2si > + =A0 =A0=3D build_function_type_list (V2SI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 V2SI_type_n= ode, NULL_TREE); > > =A0 tree di_ftype_di_v4hi_v4hi > =A0 =A0 =3D build_function_type_list (long_long_unsigned_type_node, > @@ -20571,6 +20675,48 @@ arm_init_iwmmxt_builtins (void) > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V4HI_type_= node,V4HI_type_node, > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0NULL_TREE); > > + =A0tree v2si_ftype_v2si_v4hi_v4hi > + =A0 =A0=3D build_function_type_list (V2SI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V2SI_typ= e_node, V4HI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V4HI_typ= e_node, NULL_TREE); > + > + =A0tree v2si_ftype_v2si_v8qi_v8qi > + =A0 =A0=3D build_function_type_list (V2SI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V2SI_typ= e_node, V8QI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0V8QI_typ= e_node, NULL_TREE); > + > + =A0tree di_ftype_di_v2si_v2si > + =A0 =A0 =3D build_function_type_list (long_long_unsigned_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 long_lo= ng_unsigned_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 V2SI_ty= pe_node, V2SI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 NULL_TR= EE); > + > + =A0 tree di_ftype_di_di_int > + =A0 =A0 =3D build_function_type_list (long_long_unsigned_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 long_lo= ng_unsigned_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 long_lo= ng_unsigned_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 integer= _type_node, NULL_TREE); > + > + =A0 tree void_ftype_void > + =A0 =A0 =3D build_function_type_list (void_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 NULL_TR= EE); > + > + =A0 tree void_ftype_int > + =A0 =A0 =3D build_function_type_list (void_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 integer= _type_node, NULL_TREE); > + > + =A0 tree v8qi_ftype_char > + =A0 =A0 =3D build_function_type_list (V8QI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 signed_= char_type_node, NULL_TREE); > + > + =A0 tree v4hi_ftype_short > + =A0 =A0 =3D build_function_type_list (V4HI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 short_i= nteger_type_node, NULL_TREE); > + > + =A0 tree v2si_ftype_int > + =A0 =A0 =3D build_function_type_list (V2SI_type_node, > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 integer= _type_node, NULL_TREE); > + > =A0 /* Normal vector binops. =A0*/ > =A0 tree v8qi_ftype_v8qi_v8qi > =A0 =A0 =3D build_function_type_list (V8QI_type_node, > @@ -20628,9 +20774,19 @@ arm_init_iwmmxt_builtins (void) > =A0 def_mbuiltin (FL_IWMMXT, "__builtin_arm_" NAME, (TYPE), =A0 =A0 =A0\ > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0ARM_BUILTIN_ ## CODE) > > +#define iwmmx2_mbuiltin(NAME, TYPE, CODE) =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0 =A0\ > + =A0def_mbuiltin (FL_IWMMXT2, "__builtin_arm_" NAME, (TYPE), =A0 =A0 \ > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 ARM_BUILTIN_ ## CODE) > + > =A0 iwmmx_mbuiltin ("wzero", di_ftype_void, WZERO); > - =A0iwmmx_mbuiltin ("setwcx", void_ftype_int_int, SETWCX); > - =A0iwmmx_mbuiltin ("getwcx", int_ftype_int, GETWCX); > + =A0iwmmx_mbuiltin ("setwcgr0", void_ftype_int, SETWCGR0); > + =A0iwmmx_mbuiltin ("setwcgr1", void_ftype_int, SETWCGR1); > + =A0iwmmx_mbuiltin ("setwcgr2", void_ftype_int, SETWCGR2); > + =A0iwmmx_mbuiltin ("setwcgr3", void_ftype_int, SETWCGR3); > + =A0iwmmx_mbuiltin ("getwcgr0", int_ftype_void, GETWCGR0); > + =A0iwmmx_mbuiltin ("getwcgr1", int_ftype_void, GETWCGR1); > + =A0iwmmx_mbuiltin ("getwcgr2", int_ftype_void, GETWCGR2); > + =A0iwmmx_mbuiltin ("getwcgr3", int_ftype_void, GETWCGR3); > > =A0 iwmmx_mbuiltin ("wsllh", v4hi_ftype_v4hi_di, WSLLH); > =A0 iwmmx_mbuiltin ("wsllw", v2si_ftype_v2si_di, WSLLW); > @@ -20662,8 +20818,14 @@ arm_init_iwmmxt_builtins (void) > > =A0 iwmmx_mbuiltin ("wshufh", v4hi_ftype_v4hi_int, WSHUFH); > > - =A0iwmmx_mbuiltin ("wsadb", v2si_ftype_v8qi_v8qi, WSADB); > - =A0iwmmx_mbuiltin ("wsadh", v2si_ftype_v4hi_v4hi, WSADH); > + =A0iwmmx_mbuiltin ("wsadb", v2si_ftype_v2si_v8qi_v8qi, WSADB); > + =A0iwmmx_mbuiltin ("wsadh", v2si_ftype_v2si_v4hi_v4hi, WSADH); > + =A0iwmmx_mbuiltin ("wmadds", v2si_ftype_v4hi_v4hi, WMADDS); > + =A0iwmmx2_mbuiltin ("wmaddsx", v2si_ftype_v4hi_v4hi, WMADDSX); > + =A0iwmmx2_mbuiltin ("wmaddsn", v2si_ftype_v4hi_v4hi, WMADDSN); > + =A0iwmmx_mbuiltin ("wmaddu", v2si_ftype_v4hi_v4hi, WMADDU); > + =A0iwmmx2_mbuiltin ("wmaddux", v2si_ftype_v4hi_v4hi, WMADDUX); > + =A0iwmmx2_mbuiltin ("wmaddun", v2si_ftype_v4hi_v4hi, WMADDUN); > =A0 iwmmx_mbuiltin ("wsadbz", v2si_ftype_v8qi_v8qi, WSADBZ); > =A0 iwmmx_mbuiltin ("wsadhz", v2si_ftype_v4hi_v4hi, WSADHZ); > > @@ -20685,6 +20847,9 @@ arm_init_iwmmxt_builtins (void) > =A0 iwmmx_mbuiltin ("tmovmskh", int_ftype_v4hi, TMOVMSKH); > =A0 iwmmx_mbuiltin ("tmovmskw", int_ftype_v2si, TMOVMSKW); > > + =A0iwmmx2_mbuiltin ("waddbhusm", v8qi_ftype_v4hi_v8qi, WADDBHUSM); > + =A0iwmmx2_mbuiltin ("waddbhusl", v8qi_ftype_v4hi_v8qi, WADDBHUSL); > + > =A0 iwmmx_mbuiltin ("wpackhss", v8qi_ftype_v4hi_v4hi, WPACKHSS); > =A0 iwmmx_mbuiltin ("wpackhus", v8qi_ftype_v4hi_v4hi, WPACKHUS); > =A0 iwmmx_mbuiltin ("wpackwus", v4hi_ftype_v2si_v2si, WPACKWUS); > @@ -20710,7 +20875,7 @@ arm_init_iwmmxt_builtins (void) > =A0 iwmmx_mbuiltin ("wmacu", di_ftype_di_v4hi_v4hi, WMACU); > =A0 iwmmx_mbuiltin ("wmacuz", di_ftype_v4hi_v4hi, WMACUZ); > > - =A0iwmmx_mbuiltin ("walign", v8qi_ftype_v8qi_v8qi_int, WALIGN); > + =A0iwmmx_mbuiltin ("walign", v8qi_ftype_v8qi_v8qi_int, WALIGNI); > =A0 iwmmx_mbuiltin ("tmia", di_ftype_di_int_int, TMIA); > =A0 iwmmx_mbuiltin ("tmiaph", di_ftype_di_int_int, TMIAPH); > =A0 iwmmx_mbuiltin ("tmiabb", di_ftype_di_int_int, TMIABB); > @@ -20718,7 +20883,48 @@ arm_init_iwmmxt_builtins (void) > =A0 iwmmx_mbuiltin ("tmiatb", di_ftype_di_int_int, TMIATB); > =A0 iwmmx_mbuiltin ("tmiatt", di_ftype_di_int_int, TMIATT); > > + =A0iwmmx2_mbuiltin ("wabsb", v8qi_ftype_v8qi, WABSB); > + =A0iwmmx2_mbuiltin ("wabsh", v4hi_ftype_v4hi, WABSH); > + =A0iwmmx2_mbuiltin ("wabsw", v2si_ftype_v2si, WABSW); > + > + =A0iwmmx2_mbuiltin ("wqmiabb", v2si_ftype_v2si_v4hi_v4hi, WQMIABB); > + =A0iwmmx2_mbuiltin ("wqmiabt", v2si_ftype_v2si_v4hi_v4hi, WQMIABT); > + =A0iwmmx2_mbuiltin ("wqmiatb", v2si_ftype_v2si_v4hi_v4hi, WQMIATB); > + =A0iwmmx2_mbuiltin ("wqmiatt", v2si_ftype_v2si_v4hi_v4hi, WQMIATT); > + > + =A0iwmmx2_mbuiltin ("wqmiabbn", v2si_ftype_v2si_v4hi_v4hi, WQMIABBN); > + =A0iwmmx2_mbuiltin ("wqmiabtn", v2si_ftype_v2si_v4hi_v4hi, WQMIABTN); > + =A0iwmmx2_mbuiltin ("wqmiatbn", v2si_ftype_v2si_v4hi_v4hi, WQMIATBN); > + =A0iwmmx2_mbuiltin ("wqmiattn", v2si_ftype_v2si_v4hi_v4hi, WQMIATTN); > + > + =A0iwmmx2_mbuiltin ("wmiabb", di_ftype_di_v4hi_v4hi, WMIABB); > + =A0iwmmx2_mbuiltin ("wmiabt", di_ftype_di_v4hi_v4hi, WMIABT); > + =A0iwmmx2_mbuiltin ("wmiatb", di_ftype_di_v4hi_v4hi, WMIATB); > + =A0iwmmx2_mbuiltin ("wmiatt", di_ftype_di_v4hi_v4hi, WMIATT); > + > + =A0iwmmx2_mbuiltin ("wmiabbn", di_ftype_di_v4hi_v4hi, WMIABBN); > + =A0iwmmx2_mbuiltin ("wmiabtn", di_ftype_di_v4hi_v4hi, WMIABTN); > + =A0iwmmx2_mbuiltin ("wmiatbn", di_ftype_di_v4hi_v4hi, WMIATBN); > + =A0iwmmx2_mbuiltin ("wmiattn", di_ftype_di_v4hi_v4hi, WMIATTN); > + > + =A0iwmmx2_mbuiltin ("wmiawbb", di_ftype_di_v2si_v2si, WMIAWBB); > + =A0iwmmx2_mbuiltin ("wmiawbt", di_ftype_di_v2si_v2si, WMIAWBT); > + =A0iwmmx2_mbuiltin ("wmiawtb", di_ftype_di_v2si_v2si, WMIAWTB); > + =A0iwmmx2_mbuiltin ("wmiawtt", di_ftype_di_v2si_v2si, WMIAWTT); > + > + =A0iwmmx2_mbuiltin ("wmiawbbn", di_ftype_di_v2si_v2si, WMIAWBBN); > + =A0iwmmx2_mbuiltin ("wmiawbtn", di_ftype_di_v2si_v2si, WMIAWBTN); > + =A0iwmmx2_mbuiltin ("wmiawtbn", di_ftype_di_v2si_v2si, WMIAWTBN); > + =A0iwmmx2_mbuiltin ("wmiawttn", di_ftype_di_v2si_v2si, WMIAWTTN); > + > + =A0iwmmx2_mbuiltin ("wmerge", di_ftype_di_di_int, WMERGE); > + > + =A0iwmmx_mbuiltin ("tbcstb", v8qi_ftype_char, TBCSTB); > + =A0iwmmx_mbuiltin ("tbcsth", v4hi_ftype_short, TBCSTH); > + =A0iwmmx_mbuiltin ("tbcstw", v2si_ftype_int, TBCSTW); > + > =A0#undef iwmmx_mbuiltin > +#undef iwmmx2_mbuiltin > =A0} > > =A0static void > @@ -21375,6 +21581,10 @@ arm_expand_builtin (tree exp, > =A0 enum machine_mode mode0; > =A0 enum machine_mode mode1; > =A0 enum machine_mode mode2; > + =A0int opint; > + =A0int selector; > + =A0int mask; > + =A0int imm; > > =A0 if (fcode >=3D ARM_BUILTIN_NEON_BASE) > =A0 =A0 return arm_expand_neon_builtin (fcode, exp, target); > @@ -21409,6 +21619,24 @@ arm_expand_builtin (tree exp, > =A0 =A0 =A0 =A0 =A0error ("selector must be an immediate"); > =A0 =A0 =A0 =A0 =A0return gen_reg_rtx (tmode); > =A0 =A0 =A0 =A0} > + > + =A0 =A0 =A0opint =3D INTVAL (op1); > + =A0 =A0 =A0if (fcode =3D=3D ARM_BUILTIN_TEXTRMSB || fcode =3D=3D ARM_BU= ILTIN_TEXTRMUB) > + =A0 =A0 =A0 { > + =A0 =A0 =A0 =A0 if (opint > 7 || opint < 0) > + =A0 =A0 =A0 =A0 =A0 error ("the range of selector should be in 0 to 7"); > + =A0 =A0 =A0 } > + =A0 =A0 =A0else if (fcode =3D=3D ARM_BUILTIN_TEXTRMSH || fcode =3D=3D A= RM_BUILTIN_TEXTRMUH) > + =A0 =A0 =A0 { > + =A0 =A0 =A0 =A0 if (opint > 3 || opint < 0) > + =A0 =A0 =A0 =A0 =A0 error ("the range of selector should be in 0 to 3"); > + =A0 =A0 =A0 } > + =A0 =A0 =A0else /* ARM_BUILTIN_TEXTRMSW || ARM_BUILTIN_TEXTRMUW. =A0*/ > + =A0 =A0 =A0 { > + =A0 =A0 =A0 =A0 if (opint > 1 || opint < 0) > + =A0 =A0 =A0 =A0 =A0 error ("the range of selector should be in 0 to 1"); > + =A0 =A0 =A0 } > + > =A0 =A0 =A0 if (target =3D=3D 0 > =A0 =A0 =A0 =A0 =A0|| GET_MODE (target) !=3D tmode > =A0 =A0 =A0 =A0 =A0|| ! (*insn_data[icode].operand[0].predicate) (target,= tmode)) > @@ -21419,11 +21647,61 @@ arm_expand_builtin (tree exp, > =A0 =A0 =A0 emit_insn (pat); > =A0 =A0 =A0 return target; > > + =A0 =A0case ARM_BUILTIN_WALIGNI: > + =A0 =A0 =A0/* If op2 is immediate, call walighi, else call walighr. =A0= */ > + =A0 =A0 =A0arg0 =3D CALL_EXPR_ARG (exp, 0); > + =A0 =A0 =A0arg1 =3D CALL_EXPR_ARG (exp, 1); > + =A0 =A0 =A0arg2 =3D CALL_EXPR_ARG (exp, 2); > + =A0 =A0 =A0op0 =3D expand_normal (arg0); > + =A0 =A0 =A0op1 =3D expand_normal (arg1); > + =A0 =A0 =A0op2 =3D expand_normal (arg2); > + =A0 =A0 =A0if (GET_CODE (op2) =3D=3D CONST_INT) Replace this with CONST_INT_P everywhere in your patches . > + =A0 =A0 =A0 =A0{ > + =A0 =A0 =A0 =A0 icode =3D CODE_FOR_iwmmxt_waligni; > + =A0 =A0 =A0 =A0 =A0tmode =3D insn_data[icode].operand[0].mode; > + =A0 =A0 =A0 =A0 mode0 =3D insn_data[icode].operand[1].mode; > + =A0 =A0 =A0 =A0 mode1 =3D insn_data[icode].operand[2].mode; > + =A0 =A0 =A0 =A0 mode2 =3D insn_data[icode].operand[3].mode; > + =A0 =A0 =A0 =A0 =A0if (!(*insn_data[icode].operand[1].predicate) (op0, = mode0)) > + =A0 =A0 =A0 =A0 =A0 op0 =3D copy_to_mode_reg (mode0, op0); > + =A0 =A0 =A0 =A0 =A0if (!(*insn_data[icode].operand[2].predicate) (op1, = mode1)) > + =A0 =A0 =A0 =A0 =A0 op1 =3D copy_to_mode_reg (mode1, op1); > + =A0 =A0 =A0 =A0 =A0gcc_assert ((*insn_data[icode].operand[3].predicate)= (op2, mode2)); > + =A0 =A0 =A0 =A0 selector =3D INTVAL (op2); > + =A0 =A0 =A0 =A0 if (selector > 7 || selector < 0) > + =A0 =A0 =A0 =A0 =A0 error ("the range of selector should be in 0 to 7"); > + =A0 =A0 =A0 } > + =A0 =A0 =A0else > + =A0 =A0 =A0 =A0{ > + =A0 =A0 =A0 =A0 icode =3D CODE_FOR_iwmmxt_walignr; > + =A0 =A0 =A0 =A0 =A0tmode =3D insn_data[icode].operand[0].mode; > + =A0 =A0 =A0 =A0 mode0 =3D insn_data[icode].operand[1].mode; > + =A0 =A0 =A0 =A0 mode1 =3D insn_data[icode].operand[2].mode; > + =A0 =A0 =A0 =A0 mode2 =3D insn_data[icode].operand[3].mode; > + =A0 =A0 =A0 =A0 =A0if (!(*insn_data[icode].operand[1].predicate) (op0, = mode0)) > + =A0 =A0 =A0 =A0 =A0 op0 =3D copy_to_mode_reg (mode0, op0); > + =A0 =A0 =A0 =A0 =A0if (!(*insn_data[icode].operand[2].predicate) (op1, = mode1)) > + =A0 =A0 =A0 =A0 =A0 op1 =3D copy_to_mode_reg (mode1, op1); > + =A0 =A0 =A0 =A0 =A0if (!(*insn_data[icode].operand[3].predicate) (op2, = mode2)) > + =A0 =A0 =A0 =A0 =A0 op2 =3D copy_to_mode_reg (mode2, op2); > + =A0 =A0 =A0 } > + =A0 =A0 =A0if (target =3D=3D 0 > + =A0 =A0 =A0 =A0 || GET_MODE (target) !=3D tmode > + =A0 =A0 =A0 =A0 || !(*insn_data[icode].operand[0].predicate) (target, t= mode)) > + =A0 =A0 =A0 target =3D gen_reg_rtx (tmode); > + =A0 =A0 =A0pat =3D GEN_FCN (icode) (target, op0, op1, op2); > + =A0 =A0 =A0if (!pat) > + =A0 =A0 =A0 return 0; > + =A0 =A0 =A0emit_insn (pat); > + =A0 =A0 =A0return target; > + > =A0 =A0 case ARM_BUILTIN_TINSRB: > =A0 =A0 case ARM_BUILTIN_TINSRH: > =A0 =A0 case ARM_BUILTIN_TINSRW: > + =A0 =A0case ARM_BUILTIN_WMERGE: > =A0 =A0 =A0 icode =3D (fcode =3D=3D ARM_BUILTIN_TINSRB ? CODE_FOR_iwmmxt_= tinsrb > =A0 =A0 =A0 =A0 =A0 =A0 =A0 : fcode =3D=3D ARM_BUILTIN_TINSRH ? CODE_FOR_= iwmmxt_tinsrh > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMERGE ? CODE_FOR= _iwmmxt_wmerge > =A0 =A0 =A0 =A0 =A0 =A0 =A0 : CODE_FOR_iwmmxt_tinsrw); > =A0 =A0 =A0 arg0 =3D CALL_EXPR_ARG (exp, 0); > =A0 =A0 =A0 arg1 =3D CALL_EXPR_ARG (exp, 1); > @@ -21442,10 +21720,30 @@ arm_expand_builtin (tree exp, > =A0 =A0 =A0 =A0op1 =3D copy_to_mode_reg (mode1, op1); > =A0 =A0 =A0 if (! (*insn_data[icode].operand[3].predicate) (op2, mode2)) > =A0 =A0 =A0 =A0{ > - =A0 =A0 =A0 =A0 /* @@@ better error message */ > =A0 =A0 =A0 =A0 =A0error ("selector must be an immediate"); > =A0 =A0 =A0 =A0 =A0return const0_rtx; > =A0 =A0 =A0 =A0} > + =A0 =A0 =A0if (icode =3D=3D CODE_FOR_iwmmxt_wmerge) > + =A0 =A0 =A0 { > + =A0 =A0 =A0 =A0 selector =3D INTVAL (op2); > + =A0 =A0 =A0 =A0 if (selector > 7 || selector < 0) > + =A0 =A0 =A0 =A0 =A0 error ("the range of selector should be in 0 to 7"); > + =A0 =A0 =A0 } > + =A0 =A0 =A0if ((icode =3D=3D CODE_FOR_iwmmxt_tinsrb) > + =A0 =A0 =A0 =A0 || (icode =3D=3D CODE_FOR_iwmmxt_tinsrh) > + =A0 =A0 =A0 =A0 || (icode =3D=3D CODE_FOR_iwmmxt_tinsrw)) > + =A0 =A0 =A0 =A0{ > + =A0 =A0 =A0 =A0 mask =3D 0x01; > + =A0 =A0 =A0 =A0 selector=3D INTVAL (op2); > + =A0 =A0 =A0 =A0 if (icode =3D=3D CODE_FOR_iwmmxt_tinsrb && (selector < = 0 || selector > 7)) > + =A0 =A0 =A0 =A0 =A0 error ("the range of selector should be in 0 to 7"); > + =A0 =A0 =A0 =A0 else if (icode =3D=3D CODE_FOR_iwmmxt_tinsrh && (select= or < 0 ||selector > 3)) > + =A0 =A0 =A0 =A0 =A0 error ("the range of selector should be in 0 to 3"); > + =A0 =A0 =A0 =A0 else if (icode =3D=3D CODE_FOR_iwmmxt_tinsrw && (select= or < 0 ||selector > 1)) > + =A0 =A0 =A0 =A0 =A0 error ("the range of selector should be in 0 to 1"); > + =A0 =A0 =A0 =A0 mask <<=3D selector; > + =A0 =A0 =A0 =A0 op2 =3D gen_rtx_CONST_INT (SImode, mask); > + =A0 =A0 =A0 } > =A0 =A0 =A0 if (target =3D=3D 0 > =A0 =A0 =A0 =A0 =A0|| GET_MODE (target) !=3D tmode > =A0 =A0 =A0 =A0 =A0|| ! (*insn_data[icode].operand[0].predicate) (target,= tmode)) > @@ -21456,19 +21754,42 @@ arm_expand_builtin (tree exp, > =A0 =A0 =A0 emit_insn (pat); > =A0 =A0 =A0 return target; > > - =A0 =A0case ARM_BUILTIN_SETWCX: > + =A0 =A0case ARM_BUILTIN_SETWCGR0: > + =A0 =A0case ARM_BUILTIN_SETWCGR1: > + =A0 =A0case ARM_BUILTIN_SETWCGR2: > + =A0 =A0case ARM_BUILTIN_SETWCGR3: > + =A0 =A0 =A0icode =3D (fcode =3D=3D ARM_BUILTIN_SETWCGR0 ? CODE_FOR_iwmm= xt_setwcgr0 > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_SETWCGR1 ? CODE_F= OR_iwmmxt_setwcgr1 > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_SETWCGR2 ? CODE_F= OR_iwmmxt_setwcgr2 > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: CODE_FOR_iwmmxt_setwcgr3); > =A0 =A0 =A0 arg0 =3D CALL_EXPR_ARG (exp, 0); > - =A0 =A0 =A0arg1 =3D CALL_EXPR_ARG (exp, 1); > - =A0 =A0 =A0op0 =3D force_reg (SImode, expand_normal (arg0)); > - =A0 =A0 =A0op1 =3D expand_normal (arg1); > - =A0 =A0 =A0emit_insn (gen_iwmmxt_tmcr (op1, op0)); > + =A0 =A0 =A0op0 =3D expand_normal (arg0); > + =A0 =A0 =A0mode0 =3D insn_data[icode].operand[0].mode; > + =A0 =A0 =A0if (!(*insn_data[icode].operand[0].predicate) (op0, mode0)) > + =A0 =A0 =A0 =A0op0 =3D copy_to_mode_reg (mode0, op0); > + =A0 =A0 =A0pat =3D GEN_FCN (icode) (op0); > + =A0 =A0 =A0if (!pat) > + =A0 =A0 =A0 return 0; > + =A0 =A0 =A0emit_insn (pat); > =A0 =A0 =A0 return 0; > > - =A0 =A0case ARM_BUILTIN_GETWCX: > - =A0 =A0 =A0arg0 =3D CALL_EXPR_ARG (exp, 0); > - =A0 =A0 =A0op0 =3D expand_normal (arg0); > - =A0 =A0 =A0target =3D gen_reg_rtx (SImode); > - =A0 =A0 =A0emit_insn (gen_iwmmxt_tmrc (target, op0)); > + =A0 =A0case ARM_BUILTIN_GETWCGR0: > + =A0 =A0case ARM_BUILTIN_GETWCGR1: > + =A0 =A0case ARM_BUILTIN_GETWCGR2: > + =A0 =A0case ARM_BUILTIN_GETWCGR3: > + =A0 =A0 =A0icode =3D (fcode =3D=3D ARM_BUILTIN_GETWCGR0 ? CODE_FOR_iwmm= xt_getwcgr0 > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_GETWCGR1 ? CODE_F= OR_iwmmxt_getwcgr1 > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_GETWCGR2 ? CODE_F= OR_iwmmxt_getwcgr2 > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: CODE_FOR_iwmmxt_getwcgr3); > + =A0 =A0 =A0tmode =3D insn_data[icode].operand[0].mode; > + =A0 =A0 =A0if (target =3D=3D 0 > + =A0 =A0 =A0 =A0 || GET_MODE (target) !=3D tmode > + =A0 =A0 =A0 =A0 || !(*insn_data[icode].operand[0].predicate) (target, t= mode)) > + =A0 =A0 =A0 =A0target =3D gen_reg_rtx (tmode); > + =A0 =A0 =A0pat =3D GEN_FCN (icode) (target); > + =A0 =A0 =A0if (!pat) > + =A0 =A0 =A0 =A0return 0; > + =A0 =A0 =A0emit_insn (pat); > =A0 =A0 =A0 return target; > > =A0 =A0 case ARM_BUILTIN_WSHUFH: > @@ -21485,10 +21806,12 @@ arm_expand_builtin (tree exp, > =A0 =A0 =A0 =A0op0 =3D copy_to_mode_reg (mode1, op0); > =A0 =A0 =A0 if (! (*insn_data[icode].operand[2].predicate) (op1, mode2)) > =A0 =A0 =A0 =A0{ > - =A0 =A0 =A0 =A0 /* @@@ better error message */ > =A0 =A0 =A0 =A0 =A0error ("mask must be an immediate"); > =A0 =A0 =A0 =A0 =A0return const0_rtx; > =A0 =A0 =A0 =A0} > + =A0 =A0 =A0selector =3D INTVAL (op1); > + =A0 =A0 =A0if (selector < 0 || selector > 255) > + =A0 =A0 =A0 error ("the range of mask should be in 0 to 255"); > =A0 =A0 =A0 if (target =3D=3D 0 > =A0 =A0 =A0 =A0 =A0|| GET_MODE (target) !=3D tmode > =A0 =A0 =A0 =A0 =A0|| ! (*insn_data[icode].operand[0].predicate) (target,= tmode)) > @@ -21499,10 +21822,18 @@ arm_expand_builtin (tree exp, > =A0 =A0 =A0 emit_insn (pat); > =A0 =A0 =A0 return target; > > - =A0 =A0case ARM_BUILTIN_WSADB: > - =A0 =A0 =A0return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadb, exp,= target); > - =A0 =A0case ARM_BUILTIN_WSADH: > - =A0 =A0 =A0return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadh, exp,= target); > + =A0 =A0case ARM_BUILTIN_WMADDS: > + =A0 =A0 =A0return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmadds, exp= , target); > + =A0 =A0case ARM_BUILTIN_WMADDSX: > + =A0 =A0 =A0return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddsx, ex= p, target); > + =A0 =A0case ARM_BUILTIN_WMADDSN: > + =A0 =A0 =A0return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddsn, ex= p, target); > + =A0 =A0case ARM_BUILTIN_WMADDU: > + =A0 =A0 =A0return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddu, exp= , target); > + =A0 =A0case ARM_BUILTIN_WMADDUX: > + =A0 =A0 =A0return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddux, ex= p, target); > + =A0 =A0case ARM_BUILTIN_WMADDUN: > + =A0 =A0 =A0return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddun, ex= p, target); > =A0 =A0 case ARM_BUILTIN_WSADBZ: > =A0 =A0 =A0 return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadbz, exp,= target); > =A0 =A0 case ARM_BUILTIN_WSADHZ: > @@ -21511,13 +21842,38 @@ arm_expand_builtin (tree exp, > =A0 =A0 =A0 /* Several three-argument builtins. =A0*/ > =A0 =A0 case ARM_BUILTIN_WMACS: > =A0 =A0 case ARM_BUILTIN_WMACU: > - =A0 =A0case ARM_BUILTIN_WALIGN: > =A0 =A0 case ARM_BUILTIN_TMIA: > =A0 =A0 case ARM_BUILTIN_TMIAPH: > =A0 =A0 case ARM_BUILTIN_TMIATT: > =A0 =A0 case ARM_BUILTIN_TMIATB: > =A0 =A0 case ARM_BUILTIN_TMIABT: > =A0 =A0 case ARM_BUILTIN_TMIABB: > + =A0 =A0case ARM_BUILTIN_WQMIABB: > + =A0 =A0case ARM_BUILTIN_WQMIABT: > + =A0 =A0case ARM_BUILTIN_WQMIATB: > + =A0 =A0case ARM_BUILTIN_WQMIATT: > + =A0 =A0case ARM_BUILTIN_WQMIABBN: > + =A0 =A0case ARM_BUILTIN_WQMIABTN: > + =A0 =A0case ARM_BUILTIN_WQMIATBN: > + =A0 =A0case ARM_BUILTIN_WQMIATTN: > + =A0 =A0case ARM_BUILTIN_WMIABB: > + =A0 =A0case ARM_BUILTIN_WMIABT: > + =A0 =A0case ARM_BUILTIN_WMIATB: > + =A0 =A0case ARM_BUILTIN_WMIATT: > + =A0 =A0case ARM_BUILTIN_WMIABBN: > + =A0 =A0case ARM_BUILTIN_WMIABTN: > + =A0 =A0case ARM_BUILTIN_WMIATBN: > + =A0 =A0case ARM_BUILTIN_WMIATTN: > + =A0 =A0case ARM_BUILTIN_WMIAWBB: > + =A0 =A0case ARM_BUILTIN_WMIAWBT: > + =A0 =A0case ARM_BUILTIN_WMIAWTB: > + =A0 =A0case ARM_BUILTIN_WMIAWTT: > + =A0 =A0case ARM_BUILTIN_WMIAWBBN: > + =A0 =A0case ARM_BUILTIN_WMIAWBTN: > + =A0 =A0case ARM_BUILTIN_WMIAWTBN: > + =A0 =A0case ARM_BUILTIN_WMIAWTTN: > + =A0 =A0case ARM_BUILTIN_WSADB: > + =A0 =A0case ARM_BUILTIN_WSADH: > =A0 =A0 =A0 icode =3D (fcode =3D=3D ARM_BUILTIN_WMACS ? CODE_FOR_iwmmxt_w= macs > =A0 =A0 =A0 =A0 =A0 =A0 =A0 : fcode =3D=3D ARM_BUILTIN_WMACU ? CODE_FOR_i= wmmxt_wmacu > =A0 =A0 =A0 =A0 =A0 =A0 =A0 : fcode =3D=3D ARM_BUILTIN_TMIA ? CODE_FOR_iw= mmxt_tmia > @@ -21526,7 +21882,32 @@ arm_expand_builtin (tree exp, > =A0 =A0 =A0 =A0 =A0 =A0 =A0 : fcode =3D=3D ARM_BUILTIN_TMIABT ? CODE_FOR_= iwmmxt_tmiabt > =A0 =A0 =A0 =A0 =A0 =A0 =A0 : fcode =3D=3D ARM_BUILTIN_TMIATB ? CODE_FOR_= iwmmxt_tmiatb > =A0 =A0 =A0 =A0 =A0 =A0 =A0 : fcode =3D=3D ARM_BUILTIN_TMIATT ? CODE_FOR_= iwmmxt_tmiatt > - =A0 =A0 =A0 =A0 =A0 =A0 =A0: CODE_FOR_iwmmxt_walign); > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WQMIABB ? CODE_FO= R_iwmmxt_wqmiabb > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WQMIABT ? CODE_FO= R_iwmmxt_wqmiabt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WQMIATB ? CODE_FO= R_iwmmxt_wqmiatb > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WQMIATT ? CODE_FO= R_iwmmxt_wqmiatt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WQMIABBN ? CODE_F= OR_iwmmxt_wqmiabbn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WQMIABTN ? CODE_F= OR_iwmmxt_wqmiabtn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WQMIATBN ? CODE_F= OR_iwmmxt_wqmiatbn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WQMIATTN ? CODE_F= OR_iwmmxt_wqmiattn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIABB ? CODE_FOR= _iwmmxt_wmiabb > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIABT ? CODE_FOR= _iwmmxt_wmiabt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIATB ? CODE_FOR= _iwmmxt_wmiatb > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIATT ? CODE_FOR= _iwmmxt_wmiatt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIABBN ? CODE_FO= R_iwmmxt_wmiabbn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIABTN ? CODE_FO= R_iwmmxt_wmiabtn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIATBN ? CODE_FO= R_iwmmxt_wmiatbn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIATTN ? CODE_FO= R_iwmmxt_wmiattn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIAWBB ? CODE_FO= R_iwmmxt_wmiawbb > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIAWBT ? CODE_FO= R_iwmmxt_wmiawbt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIAWTB ? CODE_FO= R_iwmmxt_wmiawtb > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIAWTT ? CODE_FO= R_iwmmxt_wmiawtt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIAWBBN ? CODE_F= OR_iwmmxt_wmiawbbn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIAWBTN ? CODE_F= OR_iwmmxt_wmiawbtn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIAWTBN ? CODE_F= OR_iwmmxt_wmiawtbn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WMIAWTTN ? CODE_F= OR_iwmmxt_wmiawttn > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSADB ? CODE_FOR_= iwmmxt_wsadb > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: CODE_FOR_iwmmxt_wsadh); Can this chunk here be extracted from a table. Having a nested sequence of ternary operations is just too gross. > =A0 =A0 =A0 arg0 =3D CALL_EXPR_ARG (exp, 0); > =A0 =A0 =A0 arg1 =3D CALL_EXPR_ARG (exp, 1); > =A0 =A0 =A0 arg2 =3D CALL_EXPR_ARG (exp, 2); > @@ -21559,6 +21940,123 @@ arm_expand_builtin (tree exp, > =A0 =A0 =A0 emit_insn (gen_iwmmxt_clrdi (target)); > =A0 =A0 =A0 return target; > > + =A0 =A0case ARM_BUILTIN_WSRLHI: > + =A0 =A0case ARM_BUILTIN_WSRLWI: > + =A0 =A0case ARM_BUILTIN_WSRLDI: > + =A0 =A0case ARM_BUILTIN_WSLLHI: > + =A0 =A0case ARM_BUILTIN_WSLLWI: > + =A0 =A0case ARM_BUILTIN_WSLLDI: > + =A0 =A0case ARM_BUILTIN_WSRAHI: > + =A0 =A0case ARM_BUILTIN_WSRAWI: > + =A0 =A0case ARM_BUILTIN_WSRADI: > + =A0 =A0case ARM_BUILTIN_WRORHI: > + =A0 =A0case ARM_BUILTIN_WRORWI: > + =A0 =A0case ARM_BUILTIN_WRORDI: > + =A0 =A0case ARM_BUILTIN_WSRLH: > + =A0 =A0case ARM_BUILTIN_WSRLW: > + =A0 =A0case ARM_BUILTIN_WSRLD: > + =A0 =A0case ARM_BUILTIN_WSLLH: > + =A0 =A0case ARM_BUILTIN_WSLLW: > + =A0 =A0case ARM_BUILTIN_WSLLD: > + =A0 =A0case ARM_BUILTIN_WSRAH: > + =A0 =A0case ARM_BUILTIN_WSRAW: > + =A0 =A0case ARM_BUILTIN_WSRAD: > + =A0 =A0case ARM_BUILTIN_WRORH: > + =A0 =A0case ARM_BUILTIN_WRORW: > + =A0 =A0case ARM_BUILTIN_WRORD: > + =A0 =A0 =A0icode =3D (fcode =3D=3D ARM_BUILTIN_WSRLHI ? CODE_FOR_lshrv4= hi3_iwmmxt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRLWI ? CODE_FOR= _lshrv2si3_iwmmxt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRLDI ? CODE_FOR= _lshrdi3_iwmmxt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSLLHI ? CODE_FOR= _ashlv4hi3_iwmmxt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSLLWI ? CODE_FOR= _ashlv2si3_iwmmxt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSLLDI ? CODE_FOR= _ashldi3_iwmmxt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRAHI ? CODE_FOR= _ashrv4hi3_iwmmxt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRAWI ? CODE_FOR= _ashrv2si3_iwmmxt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRADI ? CODE_FOR= _ashrdi3_iwmmxt > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WRORHI ? CODE_FOR= _rorv4hi3 > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WRORWI ? CODE_FOR= _rorv2si3 > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WRORDI ? CODE_FOR= _rordi3 > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRLH =A0? CODE_F= OR_lshrv4hi3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRLW =A0? CODE_F= OR_lshrv2si3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRLD =A0? CODE_F= OR_lshrdi3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSLLH =A0? CODE_F= OR_ashlv4hi3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSLLW =A0? CODE_F= OR_ashlv2si3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSLLD =A0? CODE_F= OR_ashldi3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRAH =A0? CODE_F= OR_ashrv4hi3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRAW =A0? CODE_F= OR_ashrv2si3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WSRAD =A0? CODE_F= OR_ashrdi3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WRORH =A0? CODE_F= OR_rorv4hi3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WRORW =A0? CODE_F= OR_rorv2si3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: fcode =3D=3D ARM_BUILTIN_WRORD =A0? CODE_F= OR_rordi3_di > + =A0 =A0 =A0 =A0 =A0 =A0 =A0: CODE_FOR_nothing); > + =A0 =A0 =A0arg1 =3D CALL_EXPR_ARG (exp, 1); > + =A0 =A0 =A0op1 =3D expand_normal (arg1); > + =A0 =A0 =A0if (GET_MODE (op1) =3D=3D VOIDmode) > + =A0 =A0 =A0 { > + =A0 =A0 =A0 =A0 imm =3D INTVAL (op1); > + =A0 =A0 =A0 =A0 if ((fcode =3D=3D ARM_BUILTIN_WRORHI || fcode =3D=3D AR= M_BUILTIN_WRORWI > + =A0 =A0 =A0 =A0 =A0 =A0 =A0|| fcode =3D=3D ARM_BUILTIN_WRORH || fcode = =3D=3D ARM_BUILTIN_WRORW) > + =A0 =A0 =A0 =A0 =A0 =A0 && (imm < 0 || imm > 32)) > + =A0 =A0 =A0 =A0 =A0 { > + =A0 =A0 =A0 =A0 =A0 =A0 if (fcode =3D=3D ARM_BUILTIN_WRORHI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the range of count should be in 0 t= o 32. =A0please check the intrinsic _mm_rori_pi16 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WRORWI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the range of count should be in 0 t= o 32. =A0please check the intrinsic _mm_rori_pi32 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WRORH) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the range of count should be in 0 t= o 32. =A0please check the intrinsic _mm_ror_pi16 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the range of count should be in 0 t= o 32. =A0please check the intrinsic _mm_ror_pi32 in code."); > + =A0 =A0 =A0 =A0 =A0 } > + =A0 =A0 =A0 =A0 else if ((fcode =3D=3D ARM_BUILTIN_WRORDI || fcode =3D= =3D ARM_BUILTIN_WRORD) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0&& (imm < 0 || imm > 64)) > + =A0 =A0 =A0 =A0 =A0 { > + =A0 =A0 =A0 =A0 =A0 =A0 if (fcode =3D=3D ARM_BUILTIN_WRORDI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the range of count should be in 0 t= o 64. =A0please check the intrinsic _mm_rori_si64 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the range of count should be in 0 t= o 64. =A0please check the intrinsic _mm_ror_si64 in code."); > + =A0 =A0 =A0 =A0 =A0 } > + =A0 =A0 =A0 =A0 else if (imm < 0) > + =A0 =A0 =A0 =A0 =A0 { > + =A0 =A0 =A0 =A0 =A0 =A0 if (fcode =3D=3D ARM_BUILTIN_WSRLHI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_srli_pi16 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSRLWI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_srli_pi32 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSRLDI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_srli_si64 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSLLHI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_slli_pi16 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSLLWI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_slli_pi32 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSLLDI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_slli_si64 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSRAHI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_srai_pi16 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSRAWI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_srai_pi32 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSRADI) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_srai_si64 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSRLH) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_srl_pi16 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSRLW) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_srl_pi32 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSRLD) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_srl_si64 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSLLH) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_sll_pi16 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSLLW) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_sll_pi32 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSLLD) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_sll_si64 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSRAH) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_sra_pi16 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else if (fcode =3D=3D ARM_BUILTIN_WSRAW) > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_sra_pi32 in code."); > + =A0 =A0 =A0 =A0 =A0 =A0 else > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 error ("the count should be no less than 0.= =A0please check the intrinsic _mm_sra_si64 in code."); Uggh. I'd really rather have a nicer way of doing this - Wouldn't it make more sense to extract this information from a table rather than have such a sequence of nested ifs ? Is there a way we can get to the location of the expansion and give better diagnostics using error_at ? Can you try and organize the table above to have this information as well and just index the error string from there= ? Also it would be nice to have some execute tests for some of these intrinsics in the testsuite. regards, Ramana > + =A0 =A0 =A0 =A0 =A0 } > + =A0 =A0 =A0 } > + =A0 =A0 =A0return arm_expand_binop_builtin (icode, exp, target); > + > =A0 =A0 case ARM_BUILTIN_THREAD_POINTER: > =A0 =A0 =A0 return arm_load_tp (target); > > -- > 1.7.3.4 >