From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id B7A24385841B for ; Wed, 4 Oct 2023 08:13:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B7A24385841B Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1696407222; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=cHgO0gdW+e2fVOqKqAZKKbrhrovWPCgbd0gOuwMRcyY=; b=dEhW0ReHk6pfgMyGHimqMe+KYzWaxmf/kwJaswkszsBkOWfGqXfPZLp1kDzX6zB4ZyGPIR 8zuJL/hUINA4nB6iNF8VPfbiqlpXyBY4S75zjXns7Tw3phJDMbDdfwI3qPG9fCl5ti0asA hY+jYP8+nuZvIKYuSSS3e2L+CHYsIEI= Received: from mail-lj1-f200.google.com (mail-lj1-f200.google.com [209.85.208.200]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-117-a1MT90S-MfyVJCPmbMnfSQ-1; Wed, 04 Oct 2023 04:13:40 -0400 X-MC-Unique: a1MT90S-MfyVJCPmbMnfSQ-1 Received: by mail-lj1-f200.google.com with SMTP id 38308e7fff4ca-2c032e30083so15925541fa.2 for ; Wed, 04 Oct 2023 01:13:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696407219; x=1697012019; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=cHgO0gdW+e2fVOqKqAZKKbrhrovWPCgbd0gOuwMRcyY=; b=P0594ybKuNvFGKxkIld3dqLYzzD/mJ+MVaW158uzV5nWKEOuTphyMX0nLnMVsR1CLC LJerp9Epw0ADZYIheeC9e82Cy0kuMPCMvF1z4/CahWuFVAtqzV5aZsP1OvTc+yoe6nC5 Of3A3y5VlnCSu79qZ/5ealuefNtZTkUtProRJx0wmJmw9pztCTxLu0v/HUj61NWyeMdZ q38eCKk6aWr3WmBr8RJ0Njpecn+ULANw5jLdU5mmkbS8FwfnLyMOfSVtgQElU5xJ1IkF pmzGLAp7YuXVQR05nuNtvMWK4SaJWtppd+g1np1NihIyrA3Vb9Sn1kG7eU8wYnrr3x+t zMhw== X-Gm-Message-State: AOJu0Yw+Y86SwbK5y8dwaV9etpo5zSUtJlJfcDOoDqT98LjCKju2i2PN eHRC+xOup13VFeD1JrCe3zSRWnIERtkbRP/xJc9LxBW3/78E15CIxBatpxUeb6UNXoOZWCJpLUS Dm5a80+0CJP5RXIDrz4ZCRD1ZmfUwPbXbpQ== X-Received: by 2002:a2e:9d18:0:b0:2bc:d607:4d1f with SMTP id t24-20020a2e9d18000000b002bcd6074d1fmr1316451lji.44.1696407219490; Wed, 04 Oct 2023 01:13:39 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE91ARfrq4+FlfvsPAYxsF5pr+p3gnrcTFCyvlYPSrkWjICCvqiSmW7mQfSgWqdiqmaiX04ennDPcxB/AcNzOo= X-Received: by 2002:a2e:9d18:0:b0:2bc:d607:4d1f with SMTP id t24-20020a2e9d18000000b002bcd6074d1fmr1316438lji.44.1696407219098; Wed, 04 Oct 2023 01:13:39 -0700 (PDT) MIME-Version: 1.0 References: <20230926143439.B589920431@pchp3.se.axis.com> <20231004025538.489F220439@pchp3.se.axis.com> In-Reply-To: <20231004025538.489F220439@pchp3.se.axis.com> From: Jonathan Wakely Date: Wed, 4 Oct 2023 09:13:27 +0100 Message-ID: Subject: Re: [PATCH 1/2] testsuite: Add dg-require-atomic-exchange non-atomic code To: Hans-Peter Nilsson Cc: Christophe Lyon , gcc-patches@gcc.gnu.org, libstdc++@gcc.gnu.org X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, 4 Oct 2023 at 03:56, Hans-Peter Nilsson wrote: > > > From: Christophe Lyon > > Date: Tue, 3 Oct 2023 15:20:39 +0200 > > > Maybe we need a new variant of dg-require-thread-fence ? > > Yes: many of the dg-require-thread-fence users need > something stronger. Tested arm-eabi together with the next > patch (2/2) with > RUNTESTFLAGS=--target_board=arm-sim/-mthumb/-march=armv6s-m/-mtune=cortex-m0/-mfloat-abi=soft/-mfpu=auto\ > conformance.exp=29_atomics/\* > > (Incidentally, in the patch context is seen > dg-require-atomic-builtins which is a misnomer: it should > rather be named "dg-require-lock-atomic-builtins-free".) dg-require-lock-free-atomic-builtins or dg-require-atomic-builtins-lock-free, surely? > > Ok to commit? > > -- >8 -- > Some targets (armv6) support inline atomic load and store, > i.e. dg-require-thread-fence matches, but not atomic like > atomic exchange. This directive will replace uses of > dg-require-thread-fence where an atomic exchange operation > is actually used. > > * testsuite/lib/dg-options.exp (dg-require-atomic-exchange): New proc. > * testsuite/lib/libstdc++.exp (check_v3_target_atomic_exchange): Ditto. OK > --- > libstdc++-v3/testsuite/lib/dg-options.exp | 9 ++++++ > libstdc++-v3/testsuite/lib/libstdc++.exp | 35 +++++++++++++++++++++++ > 2 files changed, 44 insertions(+) > > diff --git a/libstdc++-v3/testsuite/lib/dg-options.exp b/libstdc++-v3/testsuite/lib/dg-options.exp > index 84ad0c65330b..b13c2f244c63 100644 > --- a/libstdc++-v3/testsuite/lib/dg-options.exp > +++ b/libstdc++-v3/testsuite/lib/dg-options.exp > @@ -133,6 +133,15 @@ proc dg-require-thread-fence { args } { > return > } > > +proc dg-require-atomic-exchange { args } { > + if { ![ check_v3_target_atomic_exchange ] } { > + upvar dg-do-what dg-do-what > + set dg-do-what [list [lindex ${dg-do-what} 0] "N" "P"] > + return > + } > + return > +} > + > proc dg-require-atomic-builtins { args } { > if { ![ check_v3_target_atomic_builtins ] } { > upvar dg-do-what dg-do-what > diff --git a/libstdc++-v3/testsuite/lib/libstdc++.exp b/libstdc++-v3/testsuite/lib/libstdc++.exp > index 608056e5068e..481f81711074 100644 > --- a/libstdc++-v3/testsuite/lib/libstdc++.exp > +++ b/libstdc++-v3/testsuite/lib/libstdc++.exp > @@ -1221,6 +1221,41 @@ proc check_v3_target_thread_fence { } { > }] > } > > +proc check_v3_target_atomic_exchange { } { > + return [check_v3_target_prop_cached et_atomic_exchange { > + global cxxflags > + global DEFAULT_CXXFLAGS > + > + # Set up and link a C++11 test program that depends > + # on atomic exchange be available for "int". > + set src atomic_exchange[pid].cc > + > + set f [open $src "w"] > + puts $f " > + int i, j, k; > + int main() { > + __atomic_exchange (&i, &j, &k, __ATOMIC_SEQ_CST); > + return 0; > + }" > + close $f > + > + set cxxflags_saved $cxxflags > + set cxxflags "$cxxflags $DEFAULT_CXXFLAGS -Werror -std=gnu++11" > + > + set lines [v3_target_compile $src /dev/null executable ""] > + set cxxflags $cxxflags_saved > + file delete $src > + > + if [string match "" $lines] { > + # No error message, linking succeeded. > + return 1 > + } else { > + verbose "check_v3_target_atomic_exchange: compilation failed" 2 > + return 0 > + } > + }] > +} > + > # Return 1 if atomics_bool and atomic_int are always lock-free, 0 otherwise. > proc check_v3_target_atomic_builtins { } { > return [check_v3_target_prop_cached et_atomic_builtins { > -- > 2.30.2 > > > > > > Thanks, > > > > Christophe > > > > > > Ok to commit? > > > > > > -- >8 -- > > > Make __atomic_test_and_set consistent with other __atomic_ and __sync_ > > > builtins: call a matching library function instead of emitting > > > non-atomic code when the target has no direct insn support. > > > > > > There's special-case code handling targetm.atomic_test_and_set_trueval > > > != 1 trying a modified maybe_emit_sync_lock_test_and_set. Previously, > > > if that worked but its matching emit_store_flag_force returned NULL, > > > we'd segfault later on. Now that the caller handles NULL, gcc_assert > > > here instead. > > > > > > While the referenced PR:s are ARM-specific, the issue is general. > > > > > > PR target/107567 > > > PR target/109166 > > > * builtins.cc (expand_builtin) : > > > Handle failure from expand_builtin_atomic_test_and_set. > > > * optabs.cc (expand_atomic_test_and_set): When all attempts fail to > > > generate atomic code through target support, return NULL > > > instead of emitting non-atomic code. Also, for code handling > > > targetm.atomic_test_and_set_trueval != 1, gcc_assert result > > > from calling emit_store_flag_force instead of returning NULL. > > > --- > > > gcc/builtins.cc | 5 ++++- > > > gcc/optabs.cc | 22 +++++++--------------- > > > 2 files changed, 11 insertions(+), 16 deletions(-) > > > > > > diff --git a/gcc/builtins.cc b/gcc/builtins.cc > > > index 6e4274bb2a4e..40dfd36a3197 100644 > > > --- a/gcc/builtins.cc > > > +++ b/gcc/builtins.cc > > > @@ -8387,7 +8387,10 @@ expand_builtin (tree exp, rtx target, rtx > > > subtarget, machine_mode mode, > > > break; > > > > > > case BUILT_IN_ATOMIC_TEST_AND_SET: > > > - return expand_builtin_atomic_test_and_set (exp, target); > > > + target = expand_builtin_atomic_test_and_set (exp, target); > > > + if (target) > > > + return target; > > > + break; > > > > > > case BUILT_IN_ATOMIC_CLEAR: > > > return expand_builtin_atomic_clear (exp); > > > diff --git a/gcc/optabs.cc b/gcc/optabs.cc > > > index 8b96f23aec05..e1898da22808 100644 > > > --- a/gcc/optabs.cc > > > +++ b/gcc/optabs.cc > > > @@ -7080,25 +7080,17 @@ expand_atomic_test_and_set (rtx target, rtx mem, > > > enum memmodel model) > > > /* Recall that the legacy lock_test_and_set optab was allowed to do > > > magic > > > things with the value 1. Thus we try again without trueval. */ > > > if (!ret && targetm.atomic_test_and_set_trueval != 1) > > > - ret = maybe_emit_sync_lock_test_and_set (subtarget, mem, const1_rtx, > > > model); > > > - > > > - /* Failing all else, assume a single threaded environment and simply > > > - perform the operation. */ > > > - if (!ret) > > > { > > > - /* If the result is ignored skip the move to target. */ > > > - if (subtarget != const0_rtx) > > > - emit_move_insn (subtarget, mem); > > > + ret = maybe_emit_sync_lock_test_and_set (subtarget, mem, > > > const1_rtx, model); > > > > > > - emit_move_insn (mem, trueval); > > > - ret = subtarget; > > > + if (ret) > > > + { > > > + /* Rectify the not-one trueval. */ > > > + ret = emit_store_flag_force (target, NE, ret, const0_rtx, mode, > > > 0, 1); > > > + gcc_assert (ret); > > > + } > > > } > > > > > > - /* Recall that have to return a boolean value; rectify if trueval > > > - is not exactly one. */ > > > - if (targetm.atomic_test_and_set_trueval != 1) > > > - ret = emit_store_flag_force (target, NE, ret, const0_rtx, mode, 0, 1); > > > - > > > return ret; > > > } > > > > > > -- > > > 2.30.2 > > > > > > > > >