From: Yvan Roux <yvan.roux@linaro.org>
To: Kyrill Tkachov <kyrylo.tkachov@arm.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>,
Richard Earnshaw <Richard.Earnshaw@arm.com>
Subject: Re: [PATCH, ARM] Fix arm_subsi3_insn alternatives
Date: Mon, 13 Apr 2015 10:47:00 -0000 [thread overview]
Message-ID: <CAD57uCdbQ_RaZ7ysJYiVipOLfeKoa-0aORe3-_fUefrevD5emg@mail.gmail.com> (raw)
In-Reply-To: <55159E05.6050005@arm.com>
Ping (now that stage1 is open)
On 27 March 2015 at 19:14, Kyrill Tkachov <kyrylo.tkachov@arm.com> wrote:
>
> On 24/03/15 19:53, Yvan Roux wrote:
>>
>> Hi,
>>
>> after the issue with duplicated alternatives exhibited by PR64208, I
>> checked the arm.md file and found that *arm_subsi3_insn has a
>> duplication where alt 4 is (r,rI,r) and alt 6 is (r,r,r), this results
>> in emitting an rsb instruction instead of a sub one, but it has also
>> an impact on scheduling as the type attribute affected to alt 4 is
>> alu_imm when it could only involve registers.
>>
>> This is fixed by this small patch. Cross builded and regtested for
>> arm/armeb targets.
>> Ok for trunk (maybe for stage 1 as no PR is attached to that) ?
>
>
> Hi Yvan,
>
> I've kicked off two bootstraps of this patch on arm-none-linux-gnueabihf:
> one with arm mode and one with thumb. Both are well in stage3 so I don't
> expect
> there to be any problems and the patch looks ok to me code-wise (though
> I can't approve).
>
> This is stage 1 material by now though since there's no regression
> associated.
>
> Cheers,
> Kyrill
>
>
>>
>> Cheers,
>> Yvan
>>
>> 2105-03-24 Yvan Roux <yvan.roux@linaro.org>
>>
>> * config/arm/arm.md ("*arm_subsi3_insn"): Fixed redundant
>> alternatives.
>
>
next prev parent reply other threads:[~2015-04-13 10:47 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-24 19:53 Yvan Roux
2015-03-27 18:14 ` Kyrill Tkachov
2015-04-13 10:47 ` Yvan Roux [this message]
2015-04-13 10:55 ` Kyrill Tkachov
2015-04-13 10:59 ` Yvan Roux
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