* [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option
@ 2015-05-01 9:11 Yvan Roux
2015-05-01 11:11 ` Marcus Shawcroft
0 siblings, 1 reply; 8+ messages in thread
From: Yvan Roux @ 2015-05-01 9:11 UTC (permalink / raw)
To: gcc-patches, Maxim Kuvyrkov, Richard Earnshaw, James Greenhalgh
[-- Attachment #1: Type: text/plain, Size: 1066 bytes --]
Hi all,
As described in the thread bellow, there is a link-time workaround for
an erratum (843419) of some early revision of Cortex-A53. Similarly
to what was done for a previous erratum, this patch adds a new
configure-time option --enable-fix-cortex-a53-843419 that pass down
the linker option --fix-cortex-a53-843419.
I haven't implemented flags to explicitly disable/enable it during
compilation as it is only a linker workaround, but I can do it if you
think it's necessary.
https://sourceware.org/ml/binutils-cvs/2015-04/msg00012.html
Is it ok for trunk and/or branches ?
Thanks,
Yvan
2015-05-01 Yvan Roux <yvan.roux@linaro.org>
* configure.ac: Add --enable-fix-cortex-a53-843419 option.
* configure: Regenerate.
* config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
(LINK_SPEC): Include CA53_ERR_843419_SPEC.
* config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define.
(LINK_SPEC): Include CA53_ERR_843419_SPEC.
* doc/install.texi (aarch64*-*-*): Document
new --enable-fix-cortex-a53-843419 option.
[-- Attachment #2: erratum-843419.diff --]
[-- Type: text/plain, Size: 5608 bytes --]
diff --git a/gcc/config/aarch64/aarch64-elf-raw.h b/gcc/config/aarch64/aarch64-elf-raw.h
index ebeeb50..09dcfaf 100644
--- a/gcc/config/aarch64/aarch64-elf-raw.h
+++ b/gcc/config/aarch64/aarch64-elf-raw.h
@@ -35,10 +35,17 @@
" %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
#endif
+#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
+#define CA53_ERR_843419_SPEC " --fix-cortex-a53-843419 "
+#else
+#define CA53_ERR_843419_SPEC ""
+#endif
+
#ifndef LINK_SPEC
#define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X \
-maarch64elf%{mabi=ilp32*:32}%{mbig-endian:b}" \
- CA53_ERR_835769_SPEC
+ CA53_ERR_835769_SPEC \
+ CA53_ERR_843419_SPEC
#endif
#endif /* GCC_AARCH64_ELF_RAW_H */
diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h
index 9abb252..2219ead 100644
--- a/gcc/config/aarch64/aarch64-linux.h
+++ b/gcc/config/aarch64/aarch64-linux.h
@@ -49,8 +49,15 @@
" %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
#endif
+#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
+#define CA53_ERR_843419_SPEC " --fix-cortex-a53-843419 "
+#else
+#define CA53_ERR_843419_SPEC ""
+#endif
+
#define LINK_SPEC LINUX_TARGET_LINK_SPEC \
- CA53_ERR_835769_SPEC
+ CA53_ERR_835769_SPEC \
+ CA53_ERR_843419_SPEC
#define GNU_USER_TARGET_MATHFILE_SPEC \
"%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
diff --git a/gcc/configure b/gcc/configure
index 84f58ce..e563e94 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -923,6 +923,7 @@ enable_gnu_indirect_function
enable_initfini_array
enable_comdat
enable_fix_cortex_a53_835769
+enable_fix_cortex_a53_843419
with_glibc_version
enable_gnu_unique_object
enable_linker_build_id
@@ -1648,6 +1649,14 @@ Optional Features:
disable workaround for AArch64 Cortex-A53 erratum
835769 by default
+
+ --enable-fix-cortex-a53-843419
+ enable workaround for AArch64 Cortex-A53 erratum
+ 843419 by default
+ --disable-fix-cortex-a53-843419
+ disable workaround for AArch64 Cortex-A53 erratum
+ 843419 by default
+
--enable-gnu-unique-object
enable the use of the @gnu_unique_object ELF
extension on glibc systems
@@ -18153,7 +18162,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 18156 "configure"
+#line 18165 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -18259,7 +18268,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 18262 "configure"
+#line 18271 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -24102,6 +24111,25 @@ if test "${enable_fix_cortex_a53_835769+set}" = set; then :
fi
+ # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
+ # Check whether --enable-fix-cortex-a53-843419 was given.
+if test "${enable_fix_cortex_a53_843419+set}" = set; then :
+ enableval=$enable_fix_cortex_a53_843419;
+ case $enableval in
+ yes)
+ tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
+ ;;
+ no)
+ ;;
+ *)
+ as_fn_error "'$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
+ Valid choices are 'yes' and 'no'." "$LINENO" 5
+ ;;
+
+ esac
+
+fi
+
;;
# All TARGET_ABI_OSF targets.
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 7fb6131..55fe633 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -3592,6 +3592,29 @@ AS_HELP_STRING([--disable-fix-cortex-a53-835769],
esac
],
[])
+ # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
+ AC_ARG_ENABLE(fix-cortex-a53-843419,
+ [
+AS_HELP_STRING([--enable-fix-cortex-a53-843419],
+ [enable workaround for AArch64 Cortex-A53 erratum 843419 by default])
+AS_HELP_STRING([--disable-fix-cortex-a53-843419],
+ [disable workaround for AArch64 Cortex-A53 erratum 843419 by default])
+ ],
+ [
+ case $enableval in
+ yes)
+ tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
+ ;;
+ no)
+ ;;
+ *)
+ AC_MSG_ERROR(['$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
+ Valid choices are 'yes' and 'no'.])
+ ;;
+
+ esac
+ ],
+ [])
;;
# All TARGET_ABI_OSF targets.
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 783116e..7810696 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -3415,6 +3415,16 @@ default. The workaround is disabled by default if neither of
@option{--enable-fix-cortex-a53-835769} or
@option{--disable-fix-cortex-a53-835769} is given at configure time.
+To enable a workaround for the Cortex-A53 erratum number 843419 by default
+(for all CPUs regardless of -mcpu option given) at configure time use the
+@option{--enable-fix-cortex-a53-843419} option. This erratum workaround is
+made at link time and enabling it by default in GCC will only pass the
+corresponding flag to the linker. Conversely,
+@option{--disable-fix-cortex-a53-843419} will disable the workaround by
+default. The workaround is disabled by default if neither of
+@option{--enable-fix-cortex-a53-843419} or
+@option{--disable-fix-cortex-a53-843419} is given at configure time.
+
@html
<hr />
@end html
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option
2015-05-01 9:11 [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option Yvan Roux
@ 2015-05-01 11:11 ` Marcus Shawcroft
2015-05-01 11:39 ` Yvan Roux
0 siblings, 1 reply; 8+ messages in thread
From: Marcus Shawcroft @ 2015-05-01 11:11 UTC (permalink / raw)
To: Yvan Roux; +Cc: gcc-patches, Maxim Kuvyrkov, Richard Earnshaw, James Greenhalgh
On 1 May 2015 at 10:11, Yvan Roux <yvan.roux@linaro.org> wrote:
> Hi all,
>
> As described in the thread bellow, there is a link-time workaround for
> an erratum (843419) of some early revision of Cortex-A53. Similarly
> to what was done for a previous erratum, this patch adds a new
> configure-time option --enable-fix-cortex-a53-843419 that pass down
> the linker option --fix-cortex-a53-843419.
>
> I haven't implemented flags to explicitly disable/enable it during
> compilation as it is only a linker workaround, but I can do it if you
> think it's necessary.
Hi Yvan,
In the case of the 835769 erratum, providing such GCC configury made
(some) sense because the workaround included both a GCC and an LD
component. GCC in effect needed the option to control GCC behaviour
aswell as LD behaviour. The same is not true of 843419. The net effect
of the proposed patch here is to provide a configure option in GCC to
change the default behaviour of LD, with no other purpose within GCC
itself. This seems rather bizarre to me. I would have thought that if
the sole objective is to change the default behaviour of LD, then
there should be configure time options on LD, rather than GCC.
That said, I can also see that providing consistent behaviour across
these various work around configure options and consistent run time
options for the user will reduce confusion in the future, both for
folks building toolchains and for the folks using them. From this
perspective I think it would be better to go with this patch *and*
include the flags explicitly such the both of the current workaround
have equivalent configury behaviour and have equivalent user flags at
run time.
Cheers
/Marcus
>
> https://sourceware.org/ml/binutils-cvs/2015-04/msg00012.html
>
> Is it ok for trunk and/or branches ?
>
> Thanks,
> Yvan
>
> 2015-05-01 Yvan Roux <yvan.roux@linaro.org>
>
> * configure.ac: Add --enable-fix-cortex-a53-843419 option.
> * configure: Regenerate.
> * config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
> (LINK_SPEC): Include CA53_ERR_843419_SPEC.
> * config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define.
> (LINK_SPEC): Include CA53_ERR_843419_SPEC.
> * doc/install.texi (aarch64*-*-*): Document
> new --enable-fix-cortex-a53-843419 option.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option
2015-05-01 11:11 ` Marcus Shawcroft
@ 2015-05-01 11:39 ` Yvan Roux
2015-05-01 13:56 ` Yvan Roux
0 siblings, 1 reply; 8+ messages in thread
From: Yvan Roux @ 2015-05-01 11:39 UTC (permalink / raw)
To: Marcus Shawcroft
Cc: gcc-patches, Maxim Kuvyrkov, Richard Earnshaw, James Greenhalgh
Hi Marcus,
(Sorry wanted to cc you in my first mail but seems that gmail prefers
Maxim to Marcus ! ;)
On 1 May 2015 at 13:11, Marcus Shawcroft <marcus.shawcroft@gmail.com> wrote:
> On 1 May 2015 at 10:11, Yvan Roux <yvan.roux@linaro.org> wrote:
>> Hi all,
>>
>> As described in the thread bellow, there is a link-time workaround for
>> an erratum (843419) of some early revision of Cortex-A53. Similarly
>> to what was done for a previous erratum, this patch adds a new
>> configure-time option --enable-fix-cortex-a53-843419 that pass down
>> the linker option --fix-cortex-a53-843419.
>>
>> I haven't implemented flags to explicitly disable/enable it during
>> compilation as it is only a linker workaround, but I can do it if you
>> think it's necessary.
>
> Hi Yvan,
>
> In the case of the 835769 erratum, providing such GCC configury made
> (some) sense because the workaround included both a GCC and an LD
> component. GCC in effect needed the option to control GCC behaviour
> aswell as LD behaviour. The same is not true of 843419. The net effect
> of the proposed patch here is to provide a configure option in GCC to
> change the default behaviour of LD, with no other purpose within GCC
> itself. This seems rather bizarre to me. I would have thought that if
> the sole objective is to change the default behaviour of LD, then
> there should be configure time options on LD, rather than GCC.
Yes indeed.
> That said, I can also see that providing consistent behaviour across
> these various work around configure options and consistent run time
> options for the user will reduce confusion in the future, both for
> folks building toolchains and for the folks using them. From this
> perspective I think it would be better to go with this patch *and*
> include the flags explicitly such the both of the current workaround
> have equivalent configury behaviour and have equivalent user flags at
> run time.
Ok I'll add the -mfix-cortex-a53-843419 flags to be consistent.
Cheers
Yvan
> Cheers
> /Marcus
>
>>
>> https://sourceware.org/ml/binutils-cvs/2015-04/msg00012.html
>>
>> Is it ok for trunk and/or branches ?
>>
>> Thanks,
>> Yvan
>>
>> 2015-05-01 Yvan Roux <yvan.roux@linaro.org>
>>
>> * configure.ac: Add --enable-fix-cortex-a53-843419 option.
>> * configure: Regenerate.
>> * config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
>> (LINK_SPEC): Include CA53_ERR_843419_SPEC.
>> * config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define.
>> (LINK_SPEC): Include CA53_ERR_843419_SPEC.
>> * doc/install.texi (aarch64*-*-*): Document
>> new --enable-fix-cortex-a53-843419 option.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option
2015-05-01 11:39 ` Yvan Roux
@ 2015-05-01 13:56 ` Yvan Roux
2015-05-01 15:18 ` Marcus Shawcroft
0 siblings, 1 reply; 8+ messages in thread
From: Yvan Roux @ 2015-05-01 13:56 UTC (permalink / raw)
To: Marcus Shawcroft
Cc: gcc-patches, Maxim Kuvyrkov, Richard Earnshaw, James Greenhalgh
[-- Attachment #1: Type: text/plain, Size: 3641 bytes --]
On 1 May 2015 at 13:39, Yvan Roux <yvan.roux@linaro.org> wrote:
> Hi Marcus,
>
> (Sorry wanted to cc you in my first mail but seems that gmail prefers
> Maxim to Marcus ! ;)
>
> On 1 May 2015 at 13:11, Marcus Shawcroft <marcus.shawcroft@gmail.com> wrote:
>> On 1 May 2015 at 10:11, Yvan Roux <yvan.roux@linaro.org> wrote:
>>> Hi all,
>>>
>>> As described in the thread bellow, there is a link-time workaround for
>>> an erratum (843419) of some early revision of Cortex-A53. Similarly
>>> to what was done for a previous erratum, this patch adds a new
>>> configure-time option --enable-fix-cortex-a53-843419 that pass down
>>> the linker option --fix-cortex-a53-843419.
>>>
>>> I haven't implemented flags to explicitly disable/enable it during
>>> compilation as it is only a linker workaround, but I can do it if you
>>> think it's necessary.
>>
>> Hi Yvan,
>>
>> In the case of the 835769 erratum, providing such GCC configury made
>> (some) sense because the workaround included both a GCC and an LD
>> component. GCC in effect needed the option to control GCC behaviour
>> aswell as LD behaviour. The same is not true of 843419. The net effect
>> of the proposed patch here is to provide a configure option in GCC to
>> change the default behaviour of LD, with no other purpose within GCC
>> itself. This seems rather bizarre to me. I would have thought that if
>> the sole objective is to change the default behaviour of LD, then
>> there should be configure time options on LD, rather than GCC.
>
> Yes indeed.
>
>> That said, I can also see that providing consistent behaviour across
>> these various work around configure options and consistent run time
>> options for the user will reduce confusion in the future, both for
>> folks building toolchains and for the folks using them. From this
>> perspective I think it would be better to go with this patch *and*
>> include the flags explicitly such the both of the current workaround
>> have equivalent configury behaviour and have equivalent user flags at
>> run time.
>
> Ok I'll add the -mfix-cortex-a53-843419 flags to be consistent.
Here is the new patch, I kept the "Report" property for the flag even
if nothing is changed in the assembly generated, but I think it's good
to have the info.
Cheers,
Yvan
2015-05-01 Yvan Roux <yvan.roux@linaro.org>
* configure.ac: Add --enable-fix-cortex-a53-843419 option.
* configure: Regenerate.
* config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
(LINK_SPEC): Include CA53_ERR_843419_SPEC.
* config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define.
(LINK_SPEC): Include CA53_ERR_843419_SPEC.
* doc/install.texi (aarch64*-*-*): Document
new --enable-fix-cortex-a53-843419 option
* config/aarch64/aarch64.opt (mfix-cortex-a53-843419): New option.
* doc/invoke.texi (AArch64 Options): Document -mfix-cortex-a53-843419
and -mno-fix-cortex-a53-8434199 options.
>
> Cheers
> Yvan
>
>> Cheers
>> /Marcus
>>
>>>
>>> https://sourceware.org/ml/binutils-cvs/2015-04/msg00012.html
>>>
>>> Is it ok for trunk and/or branches ?
>>>
>>> Thanks,
>>> Yvan
>>>
>>> 2015-05-01 Yvan Roux <yvan.roux@linaro.org>
>>>
>>> * configure.ac: Add --enable-fix-cortex-a53-843419 option.
>>> * configure: Regenerate.
>>> * config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
>>> (LINK_SPEC): Include CA53_ERR_843419_SPEC.
>>> * config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define.
>>> (LINK_SPEC): Include CA53_ERR_843419_SPEC.
>>> * doc/install.texi (aarch64*-*-*): Document
>>> new --enable-fix-cortex-a53-843419 option.
[-- Attachment #2: erratum-843419-2.diff --]
[-- Type: text/plain, Size: 8191 bytes --]
diff --git a/gcc/config/aarch64/aarch64-elf-raw.h b/gcc/config/aarch64/aarch64-elf-raw.h
index ebeeb50..bd5e51c 100644
--- a/gcc/config/aarch64/aarch64-elf-raw.h
+++ b/gcc/config/aarch64/aarch64-elf-raw.h
@@ -35,10 +35,19 @@
" %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
#endif
+#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
+#define CA53_ERR_843419_SPEC \
+ " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#else
+#define CA53_ERR_843419_SPEC \
+ " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#endif
+
#ifndef LINK_SPEC
#define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X \
-maarch64elf%{mabi=ilp32*:32}%{mbig-endian:b}" \
- CA53_ERR_835769_SPEC
+ CA53_ERR_835769_SPEC \
+ CA53_ERR_843419_SPEC
#endif
#endif /* GCC_AARCH64_ELF_RAW_H */
diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h
index 9abb252..7973268 100644
--- a/gcc/config/aarch64/aarch64-linux.h
+++ b/gcc/config/aarch64/aarch64-linux.h
@@ -49,8 +49,17 @@
" %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
#endif
+#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
+#define CA53_ERR_843419_SPEC \
+ " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#else
+#define CA53_ERR_843419_SPEC \
+ " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#endif
+
#define LINK_SPEC LINUX_TARGET_LINK_SPEC \
- CA53_ERR_835769_SPEC
+ CA53_ERR_835769_SPEC \
+ CA53_ERR_843419_SPEC
#define GNU_USER_TARGET_MATHFILE_SPEC \
"%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt
index f2ef124..6d72ac2 100644
--- a/gcc/config/aarch64/aarch64.opt
+++ b/gcc/config/aarch64/aarch64.opt
@@ -71,6 +71,10 @@ mfix-cortex-a53-835769
Target Report Var(aarch64_fix_a53_err835769) Init(2)
Workaround for ARM Cortex-A53 Erratum number 835769
+mfix-cortex-a53-843419
+Target Report
+Workaround for ARM Cortex-A53 Erratum number 843419
+
mlittle-endian
Target Report RejectNegative InverseMask(BIG_END)
Assume target CPU is configured as little endian
diff --git a/gcc/configure b/gcc/configure
index 84f58ce..e563e94 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -923,6 +923,7 @@ enable_gnu_indirect_function
enable_initfini_array
enable_comdat
enable_fix_cortex_a53_835769
+enable_fix_cortex_a53_843419
with_glibc_version
enable_gnu_unique_object
enable_linker_build_id
@@ -1648,6 +1649,14 @@ Optional Features:
disable workaround for AArch64 Cortex-A53 erratum
835769 by default
+
+ --enable-fix-cortex-a53-843419
+ enable workaround for AArch64 Cortex-A53 erratum
+ 843419 by default
+ --disable-fix-cortex-a53-843419
+ disable workaround for AArch64 Cortex-A53 erratum
+ 843419 by default
+
--enable-gnu-unique-object
enable the use of the @gnu_unique_object ELF
extension on glibc systems
@@ -18153,7 +18162,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 18156 "configure"
+#line 18165 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -18259,7 +18268,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 18262 "configure"
+#line 18271 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -24102,6 +24111,25 @@ if test "${enable_fix_cortex_a53_835769+set}" = set; then :
fi
+ # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
+ # Check whether --enable-fix-cortex-a53-843419 was given.
+if test "${enable_fix_cortex_a53_843419+set}" = set; then :
+ enableval=$enable_fix_cortex_a53_843419;
+ case $enableval in
+ yes)
+ tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
+ ;;
+ no)
+ ;;
+ *)
+ as_fn_error "'$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
+ Valid choices are 'yes' and 'no'." "$LINENO" 5
+ ;;
+
+ esac
+
+fi
+
;;
# All TARGET_ABI_OSF targets.
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 7fb6131..55fe633 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -3592,6 +3592,29 @@ AS_HELP_STRING([--disable-fix-cortex-a53-835769],
esac
],
[])
+ # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
+ AC_ARG_ENABLE(fix-cortex-a53-843419,
+ [
+AS_HELP_STRING([--enable-fix-cortex-a53-843419],
+ [enable workaround for AArch64 Cortex-A53 erratum 843419 by default])
+AS_HELP_STRING([--disable-fix-cortex-a53-843419],
+ [disable workaround for AArch64 Cortex-A53 erratum 843419 by default])
+ ],
+ [
+ case $enableval in
+ yes)
+ tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
+ ;;
+ no)
+ ;;
+ *)
+ AC_MSG_ERROR(['$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
+ Valid choices are 'yes' and 'no'.])
+ ;;
+
+ esac
+ ],
+ [])
;;
# All TARGET_ABI_OSF targets.
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 783116e..169ecf1 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -3408,13 +3408,24 @@ not support option @option{-mabi=ilp32}.
To enable a workaround for the Cortex-A53 erratum number 835769 by default
(for all CPUs regardless of -mcpu option given) at configure time use the
@option{--enable-fix-cortex-a53-835769} option. This will enable the fix by
-default and can be explicitly disabled during during compilation by passing the
+default and can be explicitly disabled during compilation by passing the
@option{-mno-fix-cortex-a53-835769} option. Conversely,
@option{--disable-fix-cortex-a53-835769} will disable the workaround by
default. The workaround is disabled by default if neither of
@option{--enable-fix-cortex-a53-835769} or
@option{--disable-fix-cortex-a53-835769} is given at configure time.
+To enable a workaround for the Cortex-A53 erratum number 843419 by default
+(for all CPUs regardless of -mcpu option given) at configure time use the
+@option{--enable-fix-cortex-a53-843419} option. This erratum workaround is
+made at link time and enabling it by default in GCC will only pass the
+corresponding flag to the linker. It can be explicitly disabled during
+compilation by passing the @option{-mno-fix-cortex-a53-835769} option.
+Conversely, @option{--disable-fix-cortex-a53-843419} will disable the
+workaround by default. The workaround is disabled by default if neither of
+@option{--enable-fix-cortex-a53-843419} or
+@option{--disable-fix-cortex-a53-843419} is given at configure time.
+
@html
<hr />
@end html
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 7d2f6e5..712c187 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -512,6 +512,7 @@ Objective-C and Objective-C++ Dialects}.
-momit-leaf-frame-pointer -mno-omit-leaf-frame-pointer @gol
-mtls-dialect=desc -mtls-dialect=traditional @gol
-mfix-cortex-a53-835769 -mno-fix-cortex-a53-835769 @gol
+-mfix-cortex-a53-843419 -mno-fix-cortex-a53-843419 @gol
-march=@var{name} -mcpu=@var{name} -mtune=@var{name}}
@emph{Adapteva Epiphany Options}
@@ -12324,6 +12325,14 @@ Enable or disable the workaround for the ARM Cortex-A53 erratum number 835769.
This involves inserting a NOP instruction between memory instructions and
64-bit integer multiply-accumulate instructions.
+@item -mfix-cortex-a53-843419
+@itemx -mno-fix-cortex-a53-843419
+@opindex mfix-cortex-a53-843419
+@opindex mno-fix-cortex-a53-843419
+Enable or disable the workaround for the ARM Cortex-A53 erratum number 843419.
+This erratum workaround is made at link time and this will only pass the
+corresponding flag to the linker.
+
@item -march=@var{name}
@opindex march
Specify the name of the target architecture, optionally suffixed by one or
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option
2015-05-01 13:56 ` Yvan Roux
@ 2015-05-01 15:18 ` Marcus Shawcroft
2015-05-04 8:59 ` Yvan Roux
0 siblings, 1 reply; 8+ messages in thread
From: Marcus Shawcroft @ 2015-05-01 15:18 UTC (permalink / raw)
To: Yvan Roux; +Cc: gcc-patches, Maxim Kuvyrkov, Richard Earnshaw, James Greenhalgh
On 1 May 2015 at 14:56, Yvan Roux <yvan.roux@linaro.org> wrote:
> 2015-05-01 Yvan Roux <yvan.roux@linaro.org>
>
> * configure.ac: Add --enable-fix-cortex-a53-843419 option.
> * configure: Regenerate.
> * config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
> (LINK_SPEC): Include CA53_ERR_843419_SPEC.
> * config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define.
> (LINK_SPEC): Include CA53_ERR_843419_SPEC.
> * doc/install.texi (aarch64*-*-*): Document
> new --enable-fix-cortex-a53-843419 option
> * config/aarch64/aarch64.opt (mfix-cortex-a53-843419): New option.
> * doc/invoke.texi (AArch64 Options): Document -mfix-cortex-a53-843419
> and -mno-fix-cortex-a53-8434199 options.
>
+@option{--enable-fix-cortex-a53-843419} option. This erratum
workaround is
+made at link time and enabling it by default in GCC will only pass
the
How about something like "The workaround is applied at link time.
Enabling the workaround will cause GCC to pass the relevant option to
the linker." ?
+corresponding flag to the linker. It can be explicitly disabled
during
+compilation by passing the @option{-mno-fix-cortex-a53-835769} option.
Copy paste error here with the previous errata number.
Cheers
/Marcus
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option
2015-05-01 15:18 ` Marcus Shawcroft
@ 2015-05-04 8:59 ` Yvan Roux
2015-05-05 8:11 ` Marcus Shawcroft
0 siblings, 1 reply; 8+ messages in thread
From: Yvan Roux @ 2015-05-04 8:59 UTC (permalink / raw)
To: Marcus Shawcroft
Cc: gcc-patches, Maxim Kuvyrkov, Richard Earnshaw, James Greenhalgh
[-- Attachment #1: Type: text/plain, Size: 1544 bytes --]
Hi Marcus,
On 1 May 2015 at 17:18, Marcus Shawcroft <marcus.shawcroft@gmail.com> wrote:
> On 1 May 2015 at 14:56, Yvan Roux <yvan.roux@linaro.org> wrote:
>
>> 2015-05-01 Yvan Roux <yvan.roux@linaro.org>
>>
>> * configure.ac: Add --enable-fix-cortex-a53-843419 option.
>> * configure: Regenerate.
>> * config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
>> (LINK_SPEC): Include CA53_ERR_843419_SPEC.
>> * config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define.
>> (LINK_SPEC): Include CA53_ERR_843419_SPEC.
>> * doc/install.texi (aarch64*-*-*): Document
>> new --enable-fix-cortex-a53-843419 option
>> * config/aarch64/aarch64.opt (mfix-cortex-a53-843419): New option.
>> * doc/invoke.texi (AArch64 Options): Document -mfix-cortex-a53-843419
>> and -mno-fix-cortex-a53-8434199 options.
>>
>
> +@option{--enable-fix-cortex-a53-843419} option. This erratum
> workaround is
> +made at link time and enabling it by default in GCC will only pass
> the
>
> How about something like "The workaround is applied at link time.
> Enabling the workaround will cause GCC to pass the relevant option to
> the linker." ?
Yes this is a better formulation.
> +corresponding flag to the linker. It can be explicitly disabled
> during
> +compilation by passing the @option{-mno-fix-cortex-a53-835769} option.
>
> Copy paste error here with the previous errata number.
Here is the patch with the modifications. Is it needed to backport it
into 4.9 and 5.1 branches ?
Cheers,
Yvan
[-- Attachment #2: erratum-843419-3.diff --]
[-- Type: text/plain, Size: 8183 bytes --]
diff --git a/gcc/config/aarch64/aarch64-elf-raw.h b/gcc/config/aarch64/aarch64-elf-raw.h
index ebeeb50..bd5e51c 100644
--- a/gcc/config/aarch64/aarch64-elf-raw.h
+++ b/gcc/config/aarch64/aarch64-elf-raw.h
@@ -35,10 +35,19 @@
" %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
#endif
+#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
+#define CA53_ERR_843419_SPEC \
+ " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#else
+#define CA53_ERR_843419_SPEC \
+ " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#endif
+
#ifndef LINK_SPEC
#define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X \
-maarch64elf%{mabi=ilp32*:32}%{mbig-endian:b}" \
- CA53_ERR_835769_SPEC
+ CA53_ERR_835769_SPEC \
+ CA53_ERR_843419_SPEC
#endif
#endif /* GCC_AARCH64_ELF_RAW_H */
diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h
index 9abb252..7973268 100644
--- a/gcc/config/aarch64/aarch64-linux.h
+++ b/gcc/config/aarch64/aarch64-linux.h
@@ -49,8 +49,17 @@
" %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
#endif
+#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
+#define CA53_ERR_843419_SPEC \
+ " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#else
+#define CA53_ERR_843419_SPEC \
+ " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#endif
+
#define LINK_SPEC LINUX_TARGET_LINK_SPEC \
- CA53_ERR_835769_SPEC
+ CA53_ERR_835769_SPEC \
+ CA53_ERR_843419_SPEC
#define GNU_USER_TARGET_MATHFILE_SPEC \
"%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt
index f2ef124..6d72ac2 100644
--- a/gcc/config/aarch64/aarch64.opt
+++ b/gcc/config/aarch64/aarch64.opt
@@ -71,6 +71,10 @@ mfix-cortex-a53-835769
Target Report Var(aarch64_fix_a53_err835769) Init(2)
Workaround for ARM Cortex-A53 Erratum number 835769
+mfix-cortex-a53-843419
+Target Report
+Workaround for ARM Cortex-A53 Erratum number 843419
+
mlittle-endian
Target Report RejectNegative InverseMask(BIG_END)
Assume target CPU is configured as little endian
diff --git a/gcc/configure b/gcc/configure
index 84f58ce..e563e94 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -923,6 +923,7 @@ enable_gnu_indirect_function
enable_initfini_array
enable_comdat
enable_fix_cortex_a53_835769
+enable_fix_cortex_a53_843419
with_glibc_version
enable_gnu_unique_object
enable_linker_build_id
@@ -1648,6 +1649,14 @@ Optional Features:
disable workaround for AArch64 Cortex-A53 erratum
835769 by default
+
+ --enable-fix-cortex-a53-843419
+ enable workaround for AArch64 Cortex-A53 erratum
+ 843419 by default
+ --disable-fix-cortex-a53-843419
+ disable workaround for AArch64 Cortex-A53 erratum
+ 843419 by default
+
--enable-gnu-unique-object
enable the use of the @gnu_unique_object ELF
extension on glibc systems
@@ -18153,7 +18162,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 18156 "configure"
+#line 18165 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -18259,7 +18268,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 18262 "configure"
+#line 18271 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -24102,6 +24111,25 @@ if test "${enable_fix_cortex_a53_835769+set}" = set; then :
fi
+ # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
+ # Check whether --enable-fix-cortex-a53-843419 was given.
+if test "${enable_fix_cortex_a53_843419+set}" = set; then :
+ enableval=$enable_fix_cortex_a53_843419;
+ case $enableval in
+ yes)
+ tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
+ ;;
+ no)
+ ;;
+ *)
+ as_fn_error "'$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
+ Valid choices are 'yes' and 'no'." "$LINENO" 5
+ ;;
+
+ esac
+
+fi
+
;;
# All TARGET_ABI_OSF targets.
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 7fb6131..55fe633 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -3592,6 +3592,29 @@ AS_HELP_STRING([--disable-fix-cortex-a53-835769],
esac
],
[])
+ # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
+ AC_ARG_ENABLE(fix-cortex-a53-843419,
+ [
+AS_HELP_STRING([--enable-fix-cortex-a53-843419],
+ [enable workaround for AArch64 Cortex-A53 erratum 843419 by default])
+AS_HELP_STRING([--disable-fix-cortex-a53-843419],
+ [disable workaround for AArch64 Cortex-A53 erratum 843419 by default])
+ ],
+ [
+ case $enableval in
+ yes)
+ tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
+ ;;
+ no)
+ ;;
+ *)
+ AC_MSG_ERROR(['$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
+ Valid choices are 'yes' and 'no'.])
+ ;;
+
+ esac
+ ],
+ [])
;;
# All TARGET_ABI_OSF targets.
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 783116e..d8d3939 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -3408,13 +3408,24 @@ not support option @option{-mabi=ilp32}.
To enable a workaround for the Cortex-A53 erratum number 835769 by default
(for all CPUs regardless of -mcpu option given) at configure time use the
@option{--enable-fix-cortex-a53-835769} option. This will enable the fix by
-default and can be explicitly disabled during during compilation by passing the
+default and can be explicitly disabled during compilation by passing the
@option{-mno-fix-cortex-a53-835769} option. Conversely,
@option{--disable-fix-cortex-a53-835769} will disable the workaround by
default. The workaround is disabled by default if neither of
@option{--enable-fix-cortex-a53-835769} or
@option{--disable-fix-cortex-a53-835769} is given at configure time.
+To enable a workaround for the Cortex-A53 erratum number 843419 by default
+(for all CPUs regardless of -mcpu option given) at configure time use the
+@option{--enable-fix-cortex-a53-843419} option. This workaround is applied at
+link time. Enabling the workaround will cause GCC to pass the relevant option
+to the linker. It can be explicitly disabled during compilation by passing the
+@option{-mno-fix-cortex-a53-843419} option. Conversely,
+@option{--disable-fix-cortex-a53-843419} will disable the workaround by default.
+The workaround is disabled by default if neither of
+@option{--enable-fix-cortex-a53-843419} or
+@option{--disable-fix-cortex-a53-843419} is given at configure time.
+
@html
<hr />
@end html
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 7d2f6e5..712c187 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -512,6 +512,7 @@ Objective-C and Objective-C++ Dialects}.
-momit-leaf-frame-pointer -mno-omit-leaf-frame-pointer @gol
-mtls-dialect=desc -mtls-dialect=traditional @gol
-mfix-cortex-a53-835769 -mno-fix-cortex-a53-835769 @gol
+-mfix-cortex-a53-843419 -mno-fix-cortex-a53-843419 @gol
-march=@var{name} -mcpu=@var{name} -mtune=@var{name}}
@emph{Adapteva Epiphany Options}
@@ -12324,6 +12325,14 @@ Enable or disable the workaround for the ARM Cortex-A53 erratum number 835769.
This involves inserting a NOP instruction between memory instructions and
64-bit integer multiply-accumulate instructions.
+@item -mfix-cortex-a53-843419
+@itemx -mno-fix-cortex-a53-843419
+@opindex mfix-cortex-a53-843419
+@opindex mno-fix-cortex-a53-843419
+Enable or disable the workaround for the ARM Cortex-A53 erratum number 843419.
+This erratum workaround is made at link time and this will only pass the
+corresponding flag to the linker.
+
@item -march=@var{name}
@opindex march
Specify the name of the target architecture, optionally suffixed by one or
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option
2015-05-04 8:59 ` Yvan Roux
@ 2015-05-05 8:11 ` Marcus Shawcroft
2015-05-12 9:06 ` Yvan Roux
0 siblings, 1 reply; 8+ messages in thread
From: Marcus Shawcroft @ 2015-05-05 8:11 UTC (permalink / raw)
To: Yvan Roux; +Cc: gcc-patches, Maxim Kuvyrkov, Richard Earnshaw, James Greenhalgh
On 4 May 2015 at 09:58, Yvan Roux <yvan.roux@linaro.org> wrote:
> Yes this is a better formulation.
>
>> +corresponding flag to the linker. It can be explicitly disabled
>> during
>> +compilation by passing the @option{-mno-fix-cortex-a53-835769} option.
>>
>> Copy paste error here with the previous errata number.
>
> Here is the patch with the modifications. Is it needed to backport it
> into 4.9 and 5.1 branches ?
This is OK for trunk. The back ports make sense, but leave it 48
hours, if there are no objections then go ahead.
Cheers
/Marcus
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option
2015-05-05 8:11 ` Marcus Shawcroft
@ 2015-05-12 9:06 ` Yvan Roux
0 siblings, 0 replies; 8+ messages in thread
From: Yvan Roux @ 2015-05-12 9:06 UTC (permalink / raw)
To: Marcus Shawcroft
Cc: gcc-patches, Maxim Kuvyrkov, Richard Earnshaw, James Greenhalgh
Hi,
On 5 May 2015 at 10:11, Marcus Shawcroft <marcus.shawcroft@gmail.com> wrote:
> On 4 May 2015 at 09:58, Yvan Roux <yvan.roux@linaro.org> wrote:
>
>> Yes this is a better formulation.
>>
>>> +corresponding flag to the linker. It can be explicitly disabled
>>> during
>>> +compilation by passing the @option{-mno-fix-cortex-a53-835769} option.
>>>
>>> Copy paste error here with the previous errata number.
>>
>> Here is the patch with the modifications. Is it needed to backport it
>> into 4.9 and 5.1 branches ?
>
>
> This is OK for trunk. The back ports make sense, but leave it 48
> hours, if there are no objections then go ahead.
Committed in 5 and 4.9 branches at revisions r223044 and r223046.
Cheers,
Yvan
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2015-05-12 8:59 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
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2015-05-01 9:11 [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option Yvan Roux
2015-05-01 11:11 ` Marcus Shawcroft
2015-05-01 11:39 ` Yvan Roux
2015-05-01 13:56 ` Yvan Roux
2015-05-01 15:18 ` Marcus Shawcroft
2015-05-04 8:59 ` Yvan Roux
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