[PATCH, ARM, PR64208] LRA ICE Fix

[Yvan Roux <yvan.roux@linaro.org>]

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Hi,

This is a fix for PR64208 where LRA loops when dealing with
iwmmxt_arm_movdi insn.  As explain in the PR, the issue was introduced
on trunk and 4.9 branch by fix of PR rtl-optimization/60969 and then
workaround by r211798 (-fuse-caller-save enable for ARM).

The changes in IRA cost made by PR60969, changed the register class of
this insn output from GENERAL_REGS to IWMMXT_REGS, and the
redundancies in the insn pattern alternatives description force LRA to
reload the pseudo, which generates the same iwmmxt_arm_movdi insn,
which can't be resolved, and so on ...

Removing the redundancies fixes the issue, as LRA find that
alternative 8 (Uy => y) matches.

This issue is present in 4.9 branch, but latent on trunk (the
clobbering of IP and CC information added during -fuse-caller-save
patch changed the register allocation).

Cross compiled and regression tested on ARM targets (but not on an
IWMMXT one), is it ok for trunk and 4.9 branch ?

Rq: I think that adding IP and CC clobbers to
CALL_INSN_FUNCTION_USAGE, as specified by AAPCS, in 4.9 branch is
something we need too, I've a patch for that if you agree on that.

Thanks,
Yvan

2105-03-17  Yvan Roux  <yvan.roux@linaro.org>

    PR target/64208
    * config/arm/iwmmxt.md ("*iwmmxt_arm_movdi"): Cleanup redundant
alternatives.

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diff --git a/gcc/config/arm/iwmmxt.md b/gcc/config/arm/iwmmxt.md
index fda3c2c..d1a60ff 100644
--- a/gcc/config/arm/iwmmxt.md
+++ b/gcc/config/arm/iwmmxt.md
@@ -107,8 +107,8 @@
 )
 
 (define_insn "*iwmmxt_arm_movdi"
-  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m,y,y,yr,y,yrUy,*w, r,*w,*w, *Uv")
-        (match_operand:DI 1 "di_operand"              "rDa,Db,Dc,mi,r,y,yr,y,yrUy,y, r,*w,*w,*Uvi,*w"))]
+  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m,y,y,r, y,Uy,*w, r,*w,*w, *Uv")
+        (match_operand:DI 1 "di_operand"              "rDa,Db,Dc,mi,r,y,r,y,Uy,y,  r,*w,*w,*Uvi,*w"))]
   "TARGET_REALLY_IWMMXT
    && (   register_operand (operands[0], DImode)
        || register_operand (operands[1], DImode))"