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From: Yvan Roux <yvan.roux@linaro.org>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: [linaro/gcc-4_9-branch] Merge from gcc-4_9-branch and backports
Date: Thu, 11 Dec 2014 15:44:00 -0000	[thread overview]
Message-ID: <CAD57uCfjjM=yk8wxi50FerpPQzhYqmuC2PszqbfbbL6d4cdvMw@mail.gmail.com> (raw)

Hi all

we have merged the gcc-4_9-branch into linaro/gcc-4_9-branch up to
revision 218412 as r218423.  We have also backported this set of revisions:

* r213382 as r218352 : [AArch64] arm_neon.h - add vpaddd_f64,
vpaddd_s64, vpaddd_u64 intrinsics
* r214008 as r218354 : [AArch64] Move some code around in
aarch64_expand_mov_immediate
* r214948 as r218355 : [PATCH AArch64 1/2] Improve codegen of vector
compares inc. tst instruction
* r214949 as r218355 : [PATCH AArch64 2/2] Remove vector compare/tst __builtins
* r214950 as r218356 : [PATCH AArch64 1/2] Add execution tests of
vget_low and vget_high
* r214952 as r218356 : [PATCH AArch64 2/2] Replace temporary inline
assembler for vget_high
* r215013 as r218357 : Remove no-longer-needed fp-bit target macros.
* r215046 as r218358 : [AArch64] PR 61749: Do not ICE in lane
intrinsics when passed non-constant lane number
* r215047 as r218359 : [AArch32] Disable xordi3-opt.c/iordi3-opt.c on
thumb1 target
* r215071 as r218377 : [AArch64 Testsuite]Fix scan-assembler test
false alarm on aarch64-linux-gnu
* r215072 as r218360 : [AArch64 Testsuite] Add test of vld[234]q? intrinsic
* r215077 as r218361 : [AArch64 Testsuite] Extend test of vld1+vst1
intrinsics to cover more variants
* r215078 as r218362 : [AArch64 Testsuite] Add a test of vldN_dup intrinsics
* r215126 as r218363 : [AArch64 Testsuite] Add a test of the vldN_lane intrinsic
* r215129 as r218364 : [AArch64 Testsuite] Add a test of the
vst[234](q?) intrinics
* r215177 as r218365 : [AArch64 Testsuite] Add execution test of
vset(q?)_lane intrinsics.
* r215206 as r218351 : [AArch64] Add cost handling of CALLER_SAVE_REGS
and POINTER_REGS
* r215207 as r218351 : [AArch64] Fix cost for Q register moves
* r215208 as r218351 : [AArch64] Add regmove_costs for Cortex-A57 and A53
* r215473 as r218366 : [testsuite] whole_vector_shift
* r215475 as r218367 : [testsuite] vect-reduc-or
* r215540 as r218368 : PR rtl-optimization/63210 IRA
* r215707 as r218370 : Fix IRA ICE tmpdir-gcc-.dg-struct-layout-1/t028
* r215711 as r218371 : Accept cortex-m7/fpv5-sp-16/fpv5-d16
* r215842 as r218370 : Fix IRA ICE tmpdir-gcc-.dg-struct-layout-1/t028 -addon
* r215865 as r218373 : Add aarch64 to list of targets that support gold
* r216253 as r218374 : Remove unused variable and marco
* r216336 as r218375 : Target Legitimze Address
* r216444 as r218350 : [testsuite] Fix race in libstdc++ testsuite
* r216517 as r218378 : [testsuite] update testcases for GNU11
* r216524 as r218379 : Add -mthunderx option
* r216543 as r218380 : [testsuite] fix gcc-dg-prune glitch when
filtering "relocation truncation" error
* r216544 as r218384 : [testsuite] Update testcases for GNU11
* r216630 as r218385 : PR 63173 fix vldX_dup
* r216638 as r218386 : [testsuite] fix wrap_compile_flags
* r216765 as r218387 : PR63442 libgcc_cmp_return_mode not always
return word_mode
* r216996 as r218390 : [Patch 1/7] Hookize *_BY_PIECES_P
* r216998 as r218390 : [Patch 2/7 s390] Deprecate *_BY_PIECES_P, move
to hookized version
* r216999 as r218390 : [Patch 3/7 arc] Deprecate *_BY_PIECES_P, move
to hookized version
* r217001 as r218390 : [Patch 4/7 sh] Deprecate *_BY_PIECES_P, move to
hookized version
* r217002 as r218390 : [Patch 5/7 mips] Deprecate *_BY_PIECES_P, move
to hookized version
* r217003 as r218390 : [Patch 6/7 AArch64] Deprecate *_BY_PIECES_P,
move to hookized version
* r217004 as r218390 : [Patch 7/7] Remove *_BY_PIECES_P
* r217014 as r218391 : Fix CLZ_DEFINED_VALUE_AT_ZERO for vector modes
* r217026 as r218393 : ifcvt: Allow CC mode if HAVE_cbranchcc4
* r217076 as r218394 : Fix predicate and constraint mismatch in
logical atomic operations
* r217079 as r218398 : Migrate to new reduc_plus_scal_optab
* r217080 as r218398 : Migrate to new reduc_[us](min|max)_scal_optab
* r217742 as r218390 : PR target/63937 fix 216996
* r217971 as r218383 : [PATCH x86] Increase
PARAM_MAX_COMPLETELY_PEELED_INSNS when branch is costly
* r210735 as r218351 : Change CORE_REGS in GENERAL_REGS

This will be part of our 2014.12 4.9 release.

Thanks
Yvan

             reply	other threads:[~2014-12-11 15:44 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-11 15:44 Yvan Roux [this message]
  -- strict thread matches above, loose matches on Subject: below --
2015-03-12 13:54 Yvan Roux
2015-01-14 14:18 Yvan Roux
2014-10-17  9:21 Yvan Roux
2014-09-11 13:00 Yvan Roux
2014-08-14 15:57 Yvan Roux
2014-07-17  9:49 Yvan Roux
2014-06-12 13:13 Yvan Roux
2014-05-13 13:48 Yvan Roux

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