From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22552 invoked by alias); 31 Oct 2014 01:38:29 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 22530 invoked by uid 89); 31 Oct 2014 01:38:26 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wg0-f44.google.com Received: from mail-wg0-f44.google.com (HELO mail-wg0-f44.google.com) (74.125.82.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Fri, 31 Oct 2014 01:38:24 +0000 Received: by mail-wg0-f44.google.com with SMTP id x12so4939490wgg.17 for ; Thu, 30 Oct 2014 18:38:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:content-type; bh=wqVC7TdJj5U0FV+JvDeTcgPWE8HfEfBW9HKgQmsBf6g=; b=ZGaEtWyq8CBDncYb6Tb9A1RxkoFh0lqXpsowR39tq/fhwfy6P80o92uGMZEiJDow1t 6x0WZz3bSf1xdm0xKub47DtndN5kTZxNHNapnFZUG7FfEXEnVY3G0EKlHIIe0l44UhS4 DIHo9mr+3MnfU9UBJLCcHNI2AOoSVVwe8y9UMdHMxLOQx6G5/v/URQZv4uY5p4goBl7/ jsqP0B5vFXwb2x6CEFvta0NlzhzrUcInQSoWw0rKg5B6FNgvTJnaBdLDB1CALekYzURP aLa9PdBxeMcNAXhBDcXFmX9LCD/aYMp/sW+s2KV9Begrb05PYgzq93szPOWQpqocT8qP riVA== X-Gm-Message-State: ALoCoQmuDLGkteXfZzqllKO3tbdWC+26j/5LC8iuQs8ybmYafQLNyqjW7xUxIVsUc9/HF1kprXVt MIME-Version: 1.0 X-Received: by 10.180.211.206 with SMTP id ne14mr395371wic.79.1414719501510; Thu, 30 Oct 2014 18:38:21 -0700 (PDT) Received: by 10.194.189.138 with HTTP; Thu, 30 Oct 2014 18:38:21 -0700 (PDT) In-Reply-To: References: Date: Fri, 31 Oct 2014 05:36:00 -0000 Message-ID: Subject: Fwd: [testsuite patch] avoid test when compile options is conflict with default mthumb From: Wang Deqiang To: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset=UTF-8 X-SW-Source: 2014-10/txt/msg03247.txt.bz2 This is a ping for https://gcc.gnu.org/ml/gcc-patches/2014-10/msg01049.html ---------- Original message ---------- From: Wang Deqiang Date: 11 October 2014 11:27 Subject: [testsuite patch] avoid test when compile options is conflict with default mthumb To: gcc-patches@gcc.gnu.org When testing arm-linux-gnueabihf triple with configure options --with-mode=thumb(that makes -mthumb option default). some testcase is failed with error message "sorry, unimplemented: Thumb-1 hard-float VFP ABI". I found gcc compiler show this error message when : 1. -mthumb is used with -march=armv6 (or armv5e) and -mcpu=xscale 2. the test source have function body. And when -mthumb is the default option of compiler, the dg-skip-if functions can not detect it, There is no xscale check function in target-supports.exp in. so we need to add it . And there are only macros in the test program in check_effective_target_arm* function . no function body, we need to add it too. Here is my patch: 2014-10-08 Wangdeqiang * lib/target-supports.exp (check_effective_target_arm_ xscale_ok): New function. (check_effective_target_arm_arch_FUNC_ok): Add test function body. * gcc.target/arm/pr40887.c (dg-require-effective-target): add arm_arch_v5te_ok check * gcc.target/arm/scd42-1.c (dg-require-effective-target): add arm_xscale_ok check * gcc.target/arm/scd42-2.c : Likewise * gcc.target/arm/scd42-3.c : Likewise * gcc.target/arm/g2.c : Likewise * gcc.target/arm/xor-and.c (dg-require-effective-target): add arm_arch_v6_ok check Index: gcc/testsuite/gcc.target/arm/pr40887.c =================================================================== --- gcc/testsuite/gcc.target/arm/pr40887.c (revision 216115) +++ gcc/testsuite/gcc.target/arm/pr40887.c (working copy) @@ -1,6 +1,7 @@ /* { dg-skip-if "need at least armv5" { *-*-* } { "-march=armv[234]*" } { "" } } */ /* { dg-options "-O2 -march=armv5te" } */ /* { dg-final { scan-assembler "blx" } } */ +/* { dg-require-effective-target arm_arch_v5te_ok } */ int (*indirect_func)(int x); Index: gcc/testsuite/gcc.target/arm/scd42-2.c =================================================================== --- gcc/testsuite/gcc.target/arm/scd42-2.c (revision 216115) +++ gcc/testsuite/gcc.target/arm/scd42-2.c (working copy) @@ -5,6 +5,7 @@ /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */ /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm32 } */ +/* { dg-require-effective-target arm_xscale_ok } */ unsigned load2(void) __attribute__ ((naked)); unsigned load2(void) Index: gcc/testsuite/gcc.target/arm/scd42-3.c =================================================================== --- gcc/testsuite/gcc.target/arm/scd42-3.c (revision 216115) +++ gcc/testsuite/gcc.target/arm/scd42-3.c (working copy) @@ -3,6 +3,7 @@ /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */ /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */ /* { dg-options "-mcpu=xscale -O" } */ +/* { dg-require-effective-target arm_xscale_ok } */ unsigned load4(void) __attribute__ ((naked)); unsigned load4(void) Index: gcc/testsuite/gcc.target/arm/g2.c =================================================================== --- gcc/testsuite/gcc.target/arm/g2.c (revision 216115) +++ gcc/testsuite/gcc.target/arm/g2.c (working copy) @@ -5,6 +5,7 @@ /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */ /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm32 } */ +/* { dg-require-effective-target arm_xscale_ok } */ /* Brett Gaines' test case. */ unsigned BCPL(unsigned) __attribute__ ((naked)); Index: gcc/testsuite/gcc.target/arm/xor-and.c =================================================================== --- gcc/testsuite/gcc.target/arm/xor-and.c (revision 216115) +++ gcc/testsuite/gcc.target/arm/xor-and.c (working copy) @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-O -march=armv6" } */ /* { dg-prune-output "switch .* conflicts with" } */ +/* { dg-require-effective-target arm_arch_v6_ok } */ unsigned short foo (unsigned short x) { Index: gcc/testsuite/gcc.target/arm/scd42-1.c =================================================================== --- gcc/testsuite/gcc.target/arm/scd42-1.c (revision 216115) +++ gcc/testsuite/gcc.target/arm/scd42-1.c (working copy) @@ -2,6 +2,7 @@ /* { dg-do compile } */ /* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */ /* { dg-options "-mcpu=xscale -O" } */ +/* { dg-require-effective-target arm_xscale_ok } */ unsigned load1(void) __attribute__ ((naked)); unsigned load1(void) Index: gcc/testsuite/lib/target-supports.exp =================================================================== --- gcc/testsuite/lib/target-supports.exp (revision 216115) +++ gcc/testsuite/lib/target-supports.exp (working copy) @@ -2721,6 +2721,11 @@ foreach { armfunc armflag armdef } { v4 #if !defined (DEF) #error !DEF #endif + int + main (void) + { + return 0; + } } "FLAG" ] } @@ -2948,6 +2953,23 @@ proc check_effective_target_arm_hf_eabi }] } +# Return 1 if this is an ARM target supporting -mcpu=xscale. +# Some multilibs may be incompatible with this option. +proc check_effective_target_arm_xscale_ok { } { + if { [check_effective_target_arm32] } { + return [check_no_compiler_messages arm_xscale_ok object { + int dummy; + int + main (void) + { + return 0; + } + } "-mcpu=xscale"] + } else { + return 0 + } +} + # Return 1 if this is an ARM target supporting -mcpu=iwmmxt. # Some multilibs may be incompatible with this option.