From: Charles Baylis <charles.baylis@linaro.org>
To: GCC Patches <gcc-patches@gcc.gnu.org>,
Alan Lawrence <alan.lawrence@arm.com>,
Tejas Belagod <tejas.belagod@arm.com>,
Marcus Shawcroft <marcus.shawcroft@arm.com>,
Richard Earnshaw <rearnsha@arm.com>
Subject: [PATCH] [AArch64] PR63870 Improve error messages for NEON single lane memory access intrinsics
Date: Fri, 05 Jun 2015 17:18:00 -0000 [thread overview]
Message-ID: <CADnVucCqL8jAEpEFRT=AhCVrPLOaWrhtGhMavNjGXbryMyEQcQ@mail.gmail.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 11941 bytes --]
This is another attempt at fixing this PR63870 for AArch64 (ARM is
still to come).
As before, the Q register variants are handled by moving the check for
the lane bounds into builtin expansion. The handling of lane numbers
is made consistent wrt endianess with other NEON single lane
operations - lane numbers in RTL are flipped for big-endian, and
flipped back at assembly time.
The D register variants are now handled by adding new builtins for all
the 64bit operations. These behave identically to Q register variants,
except that the permitted lane bounds are different.
In the iterators used by the relevant patterns are changed from VQ and
VALLDIF so that the correct vector sizes are used in the endian-flip
at assembly time.
Finally, a set of machine-generated test cases is added. These do need
to be in separate files, because of testsuite limitations.
Regression tested on qemu for aarch64-linux-gnu with no regressions
and all new tests pass.
OK for trunk?
gcc/ChangeLog:
<DATE> Charles Baylis <charles.baylis@linaro.org>
PR target/63870
* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
Add qualifier_struct_load_store_lane_index.
(aarch64_types_loadstruct_lane_qualifiers): Use
qualifier_struct_load_store_lane_index for lane index argument for
last argument.
(aarch64_types_storestruct_lane_qualifiers): Ditto.
(builtin_simd_arg): Add SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
(aarch64_simd_expand_args): Add new argument describing mode of
builtin. Check lane bounds for arguments with
SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
(aarch64_simd_expand_builtin): Emit error for incorrect lane indices
if marked with SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
(aarch64_simd_expand_builtin): Handle arguments with
qualifier_struct_load_store_lane_index. Pass machine mode of builtin to
aarch64_simd_expand_args.
* config/aarch64/aarch64-simd-builtins.def: Declare ld[234]_lane and
vst[234]_lane with BUILTIN_VALLDIF.
* config/aarch64/aarch64-simd.md:
(aarch64_vec_load_lanesoi_lane<mode>): Use VALLDIF iterator. Perform
endianness reversal on lane index.
(aarch64_vec_load_lanesci_lane<mode>): Ditto.
(aarch64_vec_load_lanesxi_lane<mode>): Ditto.
(vec_store_lanesoi_lane<mode>): Use VALLDIF iterator. Fix typo
in attribute.
(vec_store_lanesci_lane<mode>): Use VALLDIF iterator.
(vec_store_lanesxi_lane<mode>): Ditto.
(aarch64_ld2_lane<mode>): Use VALLDIF iterator. Remove endianness
reversal of lane index.
(aarch64_ld3_lane<mode>): Ditto.
(aarch64_ld4_lane<mode>): Ditto.
(aarch64_st2_lane<mode>): Ditto.
(aarch64_st3_lane<mode>): Ditto.
(aarch64_st4_lane<mode>): Ditto.
* config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Rename mode parameter
to qmode. Add new mode parameter. Update uses.
(__LD3_LANE_FUNC): Ditto.
(__LD4_LANE_FUNC): Ditto.
(__ST2_LANE_FUNC): Ditto.
(__ST3_LANE_FUNC): Ditto.
(__ST4_LANE_FUNC): Ditto.
<DATE> Charles Baylis <charles.baylis@linaro.org>
* gcc.target/aarch64/simd/vld2_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld2q_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld3q_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vld4q_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst2q_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst3q_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/simd/vst4q_lane_u8_indices_1.c: New test.
[-- Attachment #2: 0001-AArch64-PR63870-Improve-error-messages-for-NEON-sing.patch --]
[-- Type: application/x-download, Size: 145582 bytes --]
next reply other threads:[~2015-06-05 17:05 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-05 17:18 Charles Baylis [this message]
2015-06-08 9:44 ` Alan Lawrence
2015-06-10 9:35 ` Charles Baylis
2015-06-10 13:01 ` Alan Lawrence
2015-06-08 10:08 ` Alan Lawrence
[not found] ` <CADnVucBF-Oc3mzsRxNzFkbqH5rvc8QNJBjZNvF9UD5QQ9tMPVw@mail.gmail.com>
2015-06-11 7:20 ` Charles Baylis
2015-06-17 14:15 ` Charles Baylis
2015-06-17 16:06 ` Alan Lawrence
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CADnVucCqL8jAEpEFRT=AhCVrPLOaWrhtGhMavNjGXbryMyEQcQ@mail.gmail.com' \
--to=charles.baylis@linaro.org \
--cc=alan.lawrence@arm.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=marcus.shawcroft@arm.com \
--cc=rearnsha@arm.com \
--cc=tejas.belagod@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).