From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by sourceware.org (Postfix) with ESMTPS id F16543858C5E for ; Tue, 28 Feb 2023 17:49:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org F16543858C5E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-wr1-x436.google.com with SMTP id l1so7601800wry.12 for ; Tue, 28 Feb 2023 09:49:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; t=1677606573; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=BWv6/WS86OOTsXC1aP/sR42up0/032Z0aCdcN68sVgk=; b=V+Yxbnd963s0vzl4c0SyFexc3feN51yy7yxQzMbgAGNFvGv/r9KR3nGaL9YRldpBan 6bO4JRuYPWuRrICvyteuQMtZosulFrIqp1eQi4n3eWvRFUrFHAzB3KCfy65WqhFIneNH CVcFlj/FDS8C/CPxgJCI4Sb3ImdE/408Krd278GfwmCBewwbL95ZwehtwUYQwlsd1gUb 6oxGh8rhpkpDE8kLGudO7oyc/anjDnLF3swWHBWGPWgVR/VoYt7G+l1rgQaxudXwDRhP g9PmuvImlE8DJx+aG4y0yZ6pscUOkOsH3/1vwlcFi2g7xkOIQLrrBn1KCsoQQCOdEWAa PXlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1677606573; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=BWv6/WS86OOTsXC1aP/sR42up0/032Z0aCdcN68sVgk=; b=Z6Fxq4JASQmyl43QXkp98/hzhhldCWoNm1G2XfzT3X+pr8cRLgt/gqOKM30mbTK3/P mIXH7ssUTjTm21dwIRK2MoDg6XeRtNgRhJUKFXpRobv/HibJSGZsTf+aq2/mk4ylB2e/ 6XFNlxxkLlicsBlwMHqXiPprw4JzHmxPo7kvUvF42qIDy0rJ+I+DBEtruPGazlLpVpID QDqTdaUip9U6rOL5XR84XrPAewUM4NZUJCTP7yn+kvFdgd+dq5cGB+LXp07qY5anPi/+ Qwq5g9weradTdkqdcO30C9naGxOhvb9FVo7f9m6Xj4r7NrP8Pkd3nAt1zytftSdQric+ 3EpQ== X-Gm-Message-State: AO0yUKXYx42fh1raIf2N8NJixTBIUBkaYm1u1gJ7x3fFMi0dYrAeaUaV 8XxYFSRe69JpqB9PagAiIyKEEXm7eVw8DCpZ7UAgnQ== X-Google-Smtp-Source: AK7set+F/wMT9hXx9+kML+NFX1bLXa48bC2SMWNHa4IuC+j3MEQsRecBh/EorDgCATFk0GNYV1lpq8J4zq5WOHPg680= X-Received: by 2002:a5d:44d2:0:b0:2c7:4ab:37fb with SMTP id z18-20020a5d44d2000000b002c704ab37fbmr754136wrr.2.1677606573585; Tue, 28 Feb 2023 09:49:33 -0800 (PST) MIME-Version: 1.0 References: <20230224055127.2500953-1-christoph.muellner@vrull.eu> <20230224055127.2500953-5-christoph.muellner@vrull.eu> In-Reply-To: From: =?UTF-8?Q?Christoph_M=C3=BCllner?= Date: Tue, 28 Feb 2023 18:49:19 +0100 Message-ID: Subject: Re: [PATCH v3 04/11] riscv: thead: Add support for the XTheadBs ISA extension To: Hans-Peter Nilsson Cc: gcc-patches@gcc.gnu.org, Kito Cheng , Jim Wilson , Palmer Dabbelt , Andrew Waterman , Philipp Tomsich , Jeff Law , Cooper Qu , Lifang Xia , Yunhai Shang , Zhiwei Liu Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-10.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,JMQ_SPF_NEUTRAL,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Sun, Feb 26, 2023 at 12:42 AM Hans-Peter Nilsson wrote: > > On Fri, 24 Feb 2023, Christoph Muellner wrote: > > diff --git a/gcc/config/riscv/thead.md b/gcc/config/riscv/thead.md > > index 158e9124c3a..2c684885850 100644 > > --- a/gcc/config/riscv/thead.md > > +++ b/gcc/config/riscv/thead.md > > @@ -29,3 +29,14 @@ (define_insn "*th_addsl" > > "th.addsl\t%0,%3,%1,%2" > > [(set_attr "type" "bitmanip") > > (set_attr "mode" "")]) > > + > > +;; XTheadBs > > + > > +(define_insn "*th_tst" > > + [(set (match_operand:X 0 "register_operand" "=r") > > + (zero_extract:X (match_operand:X 1 "register_operand" "r") > > + (const_int 1) > > + (match_operand 2 "immediate_operand" "i")))] > > (Here and same elsewhere.) > > You're unlikely to get other constant operands in that pattern, > but FWIW, the actual matching pair for just CONST_INT is > "const_int_operand" for the predicate and "n" for the > constraint. Using the right predicate and constraint will also > help the generated part of recog be a few nanoseconds faster. ;) Thank you for that comment! I think what you mean would look like this: (define_insn "*th_tst" [(set (match_operand:X 0 "register_operand" "=r") (zero_extract:X (match_operand:X 1 "register_operand" "r") (match_operand 3 "const_int_operand" "n") (match_operand 2 "immediate_operand" "i")))] "TARGET_XTHEADBS && UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode) && UINTVAL (operands[3]) == 1" "th.tst\t%0,%1,%2" [(set_attr "type" "bitmanip")]) So while we have more generic form in the pattern, the condition needs to check that the operand is equal to 1. I can change this in the patch (I don't have strong opinions about this and I do care about the nanosecond). However, I think this goes beyond this patchset. Because a single git grep shows many examples of "const_int " matches in GCC's backends. Examples can be found in gcc/config/riscv/bitmanip.md, gcc/config/aarch64/aarch64.md,... So it feels like changing the patch to use const_int_operand would go against common practice. @Kito: Any preferences about this? Thanks, Christoph