From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oa1-x2a.google.com (mail-oa1-x2a.google.com [IPv6:2001:4860:4864:20::2a]) by sourceware.org (Postfix) with ESMTPS id D47F638518B4 for ; Fri, 18 Nov 2022 09:08:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D47F638518B4 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-oa1-x2a.google.com with SMTP id 586e51a60fabf-13b6c1c89bdso5217506fac.13 for ; Fri, 18 Nov 2022 01:08:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=ykQftn/94eFjJQbb7s8BoWcRZRi0R39NsKx4Cs2Wu+g=; b=EUK+bBx9HJl/0wFAqGgppzOSq9fqhm1LZP5MdW5Emo3HFJWGFLfyQ0q06wq3T9U4SV QS+SxDn1W2JhVPLKaGsttTyCluq2lBwQRkyQ0tZfMxLfCUPmev/rvzsNdcqfyITf21gN wYWaynT+q97QwwX8uvcSB5Q/gwcLnLbvgcDFqGasD9/sJ1un3JCmFWoNCBX1GUnZnsDj jwy8MGSaCjw7iBTFmpIGNlXxhEjsh75ZQPTaHuLzmngKjEgDHOg5QezxifOa1jQ0M0Oy JR9jWRqDEHRYIYEV1T43E2+ggde6yYHWcTQbXd6hD/3wX17ghLhHc6/LuGLdGBIZ+lEC iAkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ykQftn/94eFjJQbb7s8BoWcRZRi0R39NsKx4Cs2Wu+g=; b=v2djGfOpZs/RppR7LCRXrsXGkGCPvTed9rUaA8h06o/uGHAwI9i89o0yxPhjZgMDXE krcwZY/5XNLjwv0UKadUBLh/crOrEPXMkoPklQbt3whfKy4Q5Dc5003YjVbxSqsUZNBH Vz3HrTWkxf6NGgmzAjD1gXkGMR9jjvInufA5UzZmedItu1G6XX5thuDvlmFb+w+YYc2Z Lvqd/CTxNHsf5Cmwg7C6wvXsxoN0gkBMLESr7ierSNqjtXLfmrxodz36O+kEyaBXCkV8 uooFGTEeW5v2DJ0HTZMYeLH0MdwSmwbVR6zzHc2gqJhC8e3C6FOISk0gSOLh4JZbYLjf dvkw== X-Gm-Message-State: ANoB5plywIWw0CgNiE86a/9ArLWbYl3qz5Jy56Tie83Gl2Oh6Hl7nQwn puoGEKlLi1QqgYfYnw2368wLHIrcBkSWss8GlahFmg== X-Google-Smtp-Source: AA0mqf7LzSqDk3YXE0C+NuRK5nxpx50nMCmrndecIow6RmKF0YW9+4nCh5F8WWmlFc0PD5we3oVcm88bALabamzB2Yg= X-Received: by 2002:a05:6870:7d81:b0:13b:a1e0:11eb with SMTP id oq1-20020a0568707d8100b0013ba1e011ebmr3507273oab.109.1668762526196; Fri, 18 Nov 2022 01:08:46 -0800 (PST) MIME-Version: 1.0 References: <20221118021223.348112-1-christoph.muellner@vrull.eu> In-Reply-To: From: =?UTF-8?Q?Christoph_M=C3=BCllner?= Date: Fri, 18 Nov 2022 10:08:35 +0100 Message-ID: Subject: Re: [PATCH] RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia) To: Palmer Dabbelt Cc: gcc-patches@gcc.gnu.org, kito.cheng@sifive.com, philipp.tomsich@vrull.eu, jeffreyalaw@gmail.com Content-Type: multipart/alternative; boundary="00000000000096b96e05edbb0dcb" X-Spam-Status: No, score=-9.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,HTML_MESSAGE,JMQ_SPF_NEUTRAL,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --00000000000096b96e05edbb0dcb Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, Nov 18, 2022 at 6:09 AM Palmer Dabbelt wrote: > On Thu, 17 Nov 2022 18:12:23 PST (-0800), christoph.muellner@vrull.eu > wrote: > > From: Christoph M=C3=BCllner > > > > This patch adds support for the two AIA ISA extensions Ssaia and Smaia. > > They are not relelvant for the compiler, but the assembler might want > > to validate the CSRs. Therefore, all this patch does is recognize the > > extension name, emit a feature macro (incl. a test). > > This is pretty far in the weeds, but the AIA PDF says > > extension Smaia encompasses all added CSRs and all modifications to > interrupt response behavior that the AIA specifies for a hart, over > all privilege levels > > but only a subset of AIA has been frozen. I think that's fine, assuming > we're decoupling ourselves from the ISA strings (and thus extension > names). We just need to document it somewhere -- presumably invoke, but > that doesn't document anything else yet so we don't really have a > pattern to match. > Thanks for highlighting this! We could model this such that Smaia implies Ssaia. Since the tool's interpretation of these extensions is "availability of extension's CSRs", this should work. But it is mostly irrelevant for GCC, as Binutils does the CSR checking, and we need to model it there. I see what you mean with the "subset of AIA has been frozen". I would expect that the draft chapters ("Duo-PLIC" and "IOMMU Support") will introduce new CSRs in the future. They might get included in separate extensions, be available only if another extension is enabled (like the hypervisor CSRs), or they will be put into the existing Smaia and Ssaia extensions. The last case is problematic, as it would change the behavior of the CSR checker. We could therefore document that the CSR checker strictly follows the latest specs and that changing behavior is possible for that reason. Not perfect, but reasonable and a method to permanently solve the recurring CSR discussions. > > > Signed-off-by: Christoph M=C3=BCllner > > --- > > gcc/common/config/riscv/riscv-common.cc | 2 ++ > > gcc/testsuite/gcc.target/riscv/smaia.c | 13 +++++++++++++ > > gcc/testsuite/gcc.target/riscv/ssaia.c | 13 +++++++++++++ > > 3 files changed, 28 insertions(+) > > create mode 100644 gcc/testsuite/gcc.target/riscv/smaia.c > > create mode 100644 gcc/testsuite/gcc.target/riscv/ssaia.c > > > > diff --git a/gcc/common/config/riscv/riscv-common.cc > b/gcc/common/config/riscv/riscv-common.cc > > index 4b7f777c103..674eded07b7 100644 > > --- a/gcc/common/config/riscv/riscv-common.cc > > +++ b/gcc/common/config/riscv/riscv-common.cc > > @@ -219,6 +219,8 @@ static const struct riscv_ext_version > riscv_ext_version_table[] =3D > > > > {"zmmul", ISA_SPEC_CLASS_NONE, 1, 0}, > > > > + {"smaia", ISA_SPEC_CLASS_NONE, 1, 0}, > > + {"ssaia", ISA_SPEC_CLASS_NONE, 1, 0}, > > {"svinval", ISA_SPEC_CLASS_NONE, 1, 0}, > > {"svnapot", ISA_SPEC_CLASS_NONE, 1, 0}, > > > > diff --git a/gcc/testsuite/gcc.target/riscv/smaia.c > b/gcc/testsuite/gcc.target/riscv/smaia.c > > new file mode 100644 > > index 00000000000..9ca80236245 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/riscv/smaia.c > > @@ -0,0 +1,13 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-march=3Drv64gc_smaia" { target { rv64 } } } */ > > +/* { dg-options "-march=3Drv32gc_smaia" { target { rv32 } } } */ > > + > > +#ifndef __riscv_smaia > > +#error Feature macro not defined > > +#endif > > + > > +int > > +foo (int a) > > +{ > > + return a; > > +} > > diff --git a/gcc/testsuite/gcc.target/riscv/ssaia.c > b/gcc/testsuite/gcc.target/riscv/ssaia.c > > new file mode 100644 > > index 00000000000..b20e0eb10f5 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/riscv/ssaia.c > > @@ -0,0 +1,13 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-march=3Drv64gc_ssaia" { target { rv64 } } } */ > > +/* { dg-options "-march=3Drv32gc_ssaia" { target { rv32 } } } */ > > + > > +#ifndef __riscv_ssaia > > +#error Feature macro not defined > > +#endif > > + > > +int > > +foo (int a) > > +{ > > + return a; > > +} > --00000000000096b96e05edbb0dcb--