From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt1-x82c.google.com (mail-qt1-x82c.google.com [IPv6:2607:f8b0:4864:20::82c]) by sourceware.org (Postfix) with ESMTPS id 2D1293950415 for ; Mon, 8 Mar 2021 13:16:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 2D1293950415 Received: by mail-qt1-x82c.google.com with SMTP id w6so7400728qti.6 for ; Mon, 08 Mar 2021 05:16:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=c+jwn7MhRGLk+4s74AwdtwMImAK9CNhmu/e5d8PGAlc=; b=uN4A6tmncgRlccYdQzzydt743V4QH67sPiFiC+RyACFGjaqQsmk7PMMOZsrw2hBrj1 QCb4vZcnrHlTSvMKca2OtbhTte5HDyLqAp67isCkYYBEDsP5oZTMJpWBBmCZiPCgb6lp 6noRCSQrsAC0BTE8LBJDe2avt4UXHPQPbImQlWi0AqkUbj7A+85oOdPId7AayPlURwAd NmBKsMAhc1+loeNvNUV+nRNNJ3U3KAplwDROz7QMxmVoPh6FExOeOr2RT8IKdS198rAX rNiNE/bqoMkkYMUJTgR6N/ogcUUYAdi7f30uWckawfnFJFx98AIacYkHhwGanL34WwUB 0uXQ== X-Gm-Message-State: AOAM531WnZh+xP3XOqIRNu81XL4YVla7/lSs8C4LjYPHjxveb0chLx3n T8Dir6IktsTlrum3zS9GfJxxQU0rZT2l81XsShD/IA/cW1A= X-Google-Smtp-Source: ABdhPJyJ6qYbvm8hgJVKoyJMV09Cis+Fiar63TAmGC3HXXwK2kv/END3dHC7h21gPYXKToPmMlvaP5vwggrzeXXS3rw= X-Received: by 2002:ac8:6610:: with SMTP id c16mr6366941qtp.292.1615209366680; Mon, 08 Mar 2021 05:16:06 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Uros Bizjak Date: Mon, 8 Mar 2021 14:15:55 +0100 Message-ID: Subject: Re: [PATCH] i386: Enable UINTR and HRESET for -march that supports it To: =?UTF-8?Q?Martin_Li=C5=A1ka?= Cc: "gcc-patches@gcc.gnu.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-10.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Mar 2021 13:16:08 -0000 On Mon, Mar 8, 2021 at 1:45 PM Martin Li=C5=A1ka wrote: > > Hello. > > The patch fixes missing features for -march targets that support > PTA_UINTR and PTA_HRESET. > > Patch can bootstrap on x86_64-linux-gnu and survives regression tests. > > Ready to be installed? > Thanks, > Martin > > gcc/ChangeLog: > > PR target/99463 > * config/i386/i386-options.c (ix86_option_override_internal): > Enable UINTR and HRESET for -march that supports it. > > gcc/testsuite/ChangeLog: > > PR target/99463 > * gcc.target/i386/pr99463-2.c: New test. > * gcc.target/i386/pr99463.c: New test. OK, but looking at i386.h, similar handing for several other PTA_* flags is missing. Thanks, Uros. > --- > gcc/config/i386/i386-options.c | 7 +++++++ > gcc/testsuite/gcc.target/i386/pr99463-2.c | 5 +++++ > gcc/testsuite/gcc.target/i386/pr99463.c | 5 +++++ > 3 files changed, 17 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/i386/pr99463-2.c > create mode 100644 gcc/testsuite/gcc.target/i386/pr99463.c > > diff --git a/gcc/config/i386/i386-options.c b/gcc/config/i386/i386-option= s.c > index cdeabbfca4b..410fa0cc436 100644 > --- a/gcc/config/i386/i386-options.c > +++ b/gcc/config/i386/i386-options.c > @@ -2354,6 +2354,13 @@ ix86_option_override_internal (bool main_args_p, > if (((processor_alias_table[i].flags & PTA_PKU) !=3D 0) > && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PKU)) > opts->x_ix86_isa_flags |=3D OPTION_MASK_ISA_PKU; > + if (((processor_alias_table[i].flags & PTA_UINTR) !=3D 0) > + && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_UINT= R)) > + opts->x_ix86_isa_flags2 |=3D OPTION_MASK_ISA2_UINTR; > + if (((processor_alias_table[i].flags & PTA_HRESET) !=3D 0) > + && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_HRES= ET)) > + opts->x_ix86_isa_flags2 |=3D OPTION_MASK_ISA2_HRESET; > + > > /* Don't enable x87 instructions if only general registers are > allowed by target("general-regs-only") function attribute or > diff --git a/gcc/testsuite/gcc.target/i386/pr99463-2.c b/gcc/testsuite/gc= c.target/i386/pr99463-2.c > new file mode 100644 > index 00000000000..017ca959510 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr99463-2.c > @@ -0,0 +1,5 @@ > +/* PR target/99463 */ > +/* { dg-do compile { target { ! ia32 } } } */ > +/* { dg-options "-O2 -march=3Dsapphirerapids" } */ > + > +#include "uintr-1.c" > diff --git a/gcc/testsuite/gcc.target/i386/pr99463.c b/gcc/testsuite/gcc.= target/i386/pr99463.c > new file mode 100644 > index 00000000000..0b290924118 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr99463.c > @@ -0,0 +1,5 @@ > +/* PR target/99463 */ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -march=3Dalderlake" } */ > + > +#include "hreset-1.c" > -- > 2.30.1 >