From: Uros Bizjak <ubizjak@gmail.com>
To: "Kong, Lingling" <lingling.kong@intel.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
"Liu, Hongtao" <hongtao.liu@intel.com>,
"Wang, Hongyu" <hongyu.wang@intel.com>
Subject: Re: [PATCH 1/8] [APX NF]: Support APX NF add
Date: Wed, 15 May 2024 10:46:36 +0200 [thread overview]
Message-ID: <CAFULd4Y=6B8Xci5eirb8Mkg9fC1JfsJd9spTUDoyfGhZV471tg@mail.gmail.com> (raw)
In-Reply-To: <DM4PR11MB54875F424AA0C150F24FC791ECEC2@DM4PR11MB5487.namprd11.prod.outlook.com>
On Wed, May 15, 2024 at 9:43 AM Kong, Lingling <lingling.kong@intel.com> wrote:
>
> From: Hongyu Wang <hongyu.wang@intel.com>
>
> APX NF(no flags) feature implements suppresses the update of status flags for arithmetic operations.
>
> For NF add, it is not clear whether NF add can be faster than lea. If so, the pattern needs to be adjusted to prefer LEA generation.
>
> gcc/ChangeLog:
>
> * config/i386/i386-opts.h (enum apx_features): Add nf
> enumeration.
> * config/i386/i386.h (TARGET_APX_NF): New.
> * config/i386/i386.md (*add<mode>_1_nf): New define_insn.
> * config/i386/i386.opt: Add apx_nf enumeration.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/i386/apx-ndd.c: Fixed test.
> * gcc.target/i386/apx-nf.c: New test.
>
> Co-authored-by: Lingling Kong <lingling.kong@intel.com>
>
> Bootstrapped and regtested on x86_64-linux-gnu. And Supported SPEC 2017 run normally on Intel software development emulator.
> Ok for trunk?
>
> ---
> gcc/config/i386/i386-opts.h | 3 +-
> gcc/config/i386/i386.h | 1 +
> gcc/config/i386/i386.md | 42 +++++++++++++++++++++++++
> gcc/config/i386/i386.opt | 3 ++
> gcc/testsuite/gcc.target/i386/apx-ndd.c | 2 +-
> gcc/testsuite/gcc.target/i386/apx-nf.c | 6 ++++
> 6 files changed, 55 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/apx-nf.c
>
> diff --git a/gcc/config/i386/i386-opts.h b/gcc/config/i386/i386-opts.h index ef2825803b3..60176ce609f 100644
> --- a/gcc/config/i386/i386-opts.h
> +++ b/gcc/config/i386/i386-opts.h
> @@ -140,7 +140,8 @@ enum apx_features {
> apx_push2pop2 = 1 << 1,
> apx_ndd = 1 << 2,
> apx_ppx = 1 << 3,
> - apx_all = apx_egpr | apx_push2pop2 | apx_ndd | apx_ppx,
> + apx_nf = 1<< 4,
> + apx_all = apx_egpr | apx_push2pop2 | apx_ndd | apx_ppx | apx_nf,
> };
>
> #endif
> diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 529edff93a4..f20ae4726da 100644
> --- a/gcc/config/i386/i386.h
> +++ b/gcc/config/i386/i386.h
> @@ -55,6 +55,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define TARGET_APX_PUSH2POP2 (ix86_apx_features & apx_push2pop2) #define TARGET_APX_NDD (ix86_apx_features & apx_ndd) #define TARGET_APX_PPX (ix86_apx_features & apx_ppx)
> +#define TARGET_APX_NF (ix86_apx_features & apx_nf)
>
> #include "config/vxworks-dummy.h"
>
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 764bfe20ff2..4a9e35c4990 100644
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -6233,6 +6233,48 @@
> }
> })
>
>
> +;; NF instructions.
> +
> +(define_insn "*add<mode>_1_nf"
> + [(set (match_operand:SWI 0 "nonimmediate_operand" "=rm,rje,r,r,r,r,r,r")
> + (plus:SWI
> + (match_operand:SWI 1 "nonimmediate_operand" "%0,0,0,r,r,rje,jM,r")
> + (match_operand:SWI 2 "x86_64_general_operand"
> +"r,e,BM,0,le,r,e,BM")))]
> + "TARGET_APX_NF &&
> + ix86_binary_operator_ok (PLUS, <MODE>mode, operands,
> + TARGET_APX_NDD)"
I wonder if we can use "define_subst" to conditionally add flags
clobber for !TARGET_APX_NF targets. Even the example for "Define
Subst" uses the insn w/ and w/o the clobber, so I think it is worth
considering this approach.
Uros.
next prev parent reply other threads:[~2024-05-15 8:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240515070226.3760873-1-lingling.kong@intel.com>
2024-05-15 7:43 ` Kong, Lingling
2024-05-15 8:14 ` Uros Bizjak
2024-05-15 8:36 ` Kong, Lingling
2024-05-15 8:46 ` Uros Bizjak [this message]
2024-05-22 8:29 ` [PATCH v2 " Kong, Lingling
2024-05-22 8:35 ` Uros Bizjak
[not found] ` <20240515070226.3760873-2-lingling.kong@intel.com>
2024-05-15 7:44 ` [PATCH 2/8] [APX NF] Support APX NF for {sub/and/or/xor/neg} Kong, Lingling
[not found] ` <20240515070226.3760873-3-lingling.kong@intel.com>
2024-05-15 7:44 ` [PATCH 3/8] [APX NF] Support APX NF for left shift insns Kong, Lingling
[not found] ` <20240515070226.3760873-4-lingling.kong@intel.com>
2024-05-15 7:45 ` [PATCH 4/8] [APX NF] Support APX NF for right " Kong, Lingling
[not found] ` <20240515070226.3760873-5-lingling.kong@intel.com>
2024-05-15 7:45 ` [PATCH 5/8] [APX NF] Support APX NF for rotate insns Kong, Lingling
[not found] ` <20240515070226.3760873-6-lingling.kong@intel.com>
2024-05-15 7:46 ` [PATCH 6/8] [APX NF] Support APX NF for shld/shrd Kong, Lingling
[not found] ` <20240515070226.3760873-7-lingling.kong@intel.com>
2024-05-15 7:46 ` [PATCH 7/8] [APX NF] Support APX NF for mul/div Kong, Lingling
[not found] ` <20240515070226.3760873-8-lingling.kong@intel.com>
2024-05-15 7:47 ` [PATCH 8/8] [APX NF] Support APX NF for lzcnt/tzcnt/popcnt Kong, Lingling
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