From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yw1-x112b.google.com (mail-yw1-x112b.google.com [IPv6:2607:f8b0:4864:20::112b]) by sourceware.org (Postfix) with ESMTPS id 0F63A3858D38 for ; Wed, 22 Mar 2023 07:07:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0F63A3858D38 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-yw1-x112b.google.com with SMTP id 00721157ae682-544b959a971so288370457b3.3 for ; Wed, 22 Mar 2023 00:07:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679468863; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=zAjhoSnh6hcJIGc7UDyEpO20u5ZzW1NzPcNgGGMS/dA=; b=XXLDhONMX6+ygqwGo+iRe5egTHz7+t9Grv7LxSY42ZJO2KMpra34yYVT2IpO6urk/W PI7+HDSFguec1/MI3+hCyiTMCqt2VjkxXGnp8z9qvLhT/ZXPj4YMpfEuXjgUF89coucg d+G9BKMb/LltVZttDNut3r1E5jNY19isZgp93HJIrvWXniuN0QVVU+mSTB/p13e7TIaj B6g/ncQW922rZN6+YphDma1XjByIpu0RS+Pd/k237a+KS43Itba2UxDc8lfsvamqq9zs VBWiYWh5U7Q2ByL2hpPAH0RURMIHgXC5MxC/sRbVjxjFTrdm/p9j0RVnuZ+zbTQXa6Fd z6Qg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679468863; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zAjhoSnh6hcJIGc7UDyEpO20u5ZzW1NzPcNgGGMS/dA=; b=Bqj2m1XVwPhEH011U6DjPL6/a74UgE5yenGciyuIEieDHuCFVTwJM9KrwX7XBqqmwC Ma/gpJixr5RMDyB0pIr+GXu0WR96HHIGAuyhLyIkjgh3ofI+j7quUy6agajJj9m+cuzg 7TLaXotoE89g9zVXi+ISdkedZwjR73v+lm0nAPgSc0yywp4GX3GDgMjPNrMsxBSNeFyY wgrvxLPMsncjRl/vho987N4XpOq4TAHcYQ0rrn/lsWIeMA9ZdCPI4aR7IdQwP1jv0oDA S1q688Tv8qH/QhCQhfG6xuT2k2jzrKrmnBdr1pTm10t9gEjJxLqx4hBdJ5cJBamZGMju KoOg== X-Gm-Message-State: AAQBX9d3CygNnKxLjT1y7XNjeabNCSYMjcVnfRjIRmNzemRTkNDrWN9i Pplj50KRT1LwNp3+XPVMouFp9Qej8vSsSm8CtyA= X-Google-Smtp-Source: AKy350anqIzdt2Y5Y1oZDzPr3LxJdg3oiBuhwp4YaXbSVKCvMrHSzrM+N5+mYFKQDNyQQnhfd06JOptC16p+gB+jCLA= X-Received: by 2002:a81:ac10:0:b0:541:8995:5334 with SMTP id k16-20020a81ac10000000b0054189955334mr2750282ywh.3.1679468863062; Wed, 22 Mar 2023 00:07:43 -0700 (PDT) MIME-Version: 1.0 References: <20230322025701.3369256-1-hongtao.liu@intel.com> In-Reply-To: <20230322025701.3369256-1-hongtao.liu@intel.com> From: Uros Bizjak Date: Wed, 22 Mar 2023 08:07:32 +0100 Message-ID: Subject: Re: [PATCH] Remove TARGET_GEN_MEMSET_SCRATCH_RTX since it's not used anymore. To: liuhongt Cc: gcc-patches@gcc.gnu.org, crazylht@gmail.com, hjl.tools@gmail.com, Richard Biener Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, Mar 22, 2023 at 3:59=E2=80=AFAM liuhongt wr= ote: > > The target hook is only used by i386, and the current definition is > same as default gen_reg_rtx. So there's no need for this target hook. > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. > Ok for trunk(or GCC14)? > > gcc/ChangeLog: > > * builtins.cc (builtin_memset_read_str): Replace > targetm.gen_memset_scratch_rtx with gen_reg_rtx. > (builtin_memset_gen_str): Ditto. > * config/i386/i386-expand.cc > (ix86_convert_const_wide_int_to_broadcast): Replace > ix86_gen_scratch_sse_rtx with gen_reg_rtx. > (ix86_expand_vector_move): Ditto. > * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx): > Removed. > * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed. > (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed. > * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX. > * doc/tm.texi.in: Ditto. > * target.def: Ditto. Looks trivial enough for gcc13, so OK for x86 part. Needs also OK from a middle-end reviewer. Thanks, Uros. > --- > gcc/builtins.cc | 4 ++-- > gcc/config/i386/i386-expand.cc | 6 +++--- > gcc/config/i386/i386-protos.h | 2 -- > gcc/config/i386/i386.cc | 12 ------------ > gcc/doc/tm.texi | 7 ------- > gcc/doc/tm.texi.in | 2 -- > gcc/target.def | 9 --------- > 7 files changed, 5 insertions(+), 37 deletions(-) > > diff --git a/gcc/builtins.cc b/gcc/builtins.cc > index 90246e214d6..8026e2001b7 100644 > --- a/gcc/builtins.cc > +++ b/gcc/builtins.cc > @@ -4212,7 +4212,7 @@ builtin_memset_read_str (void *data, void *prev, > return const_vec; > > /* Use the move expander with CONST_VECTOR. */ > - target =3D targetm.gen_memset_scratch_rtx (mode); > + target =3D gen_reg_rtx (mode); > emit_move_insn (target, const_vec); > return target; > } > @@ -4256,7 +4256,7 @@ builtin_memset_gen_str (void *data, void *prev, > the memset expander. */ > insn_code icode =3D optab_handler (vec_duplicate_optab, mode); > > - target =3D targetm.gen_memset_scratch_rtx (mode); > + target =3D gen_reg_rtx (mode); > class expand_operand ops[2]; > create_output_operand (&ops[0], target, mode); > create_input_operand (&ops[1], (rtx) data, QImode); > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand= .cc > index c1300dc4e26..1e3ce4b7c3f 100644 > --- a/gcc/config/i386/i386-expand.cc > +++ b/gcc/config/i386/i386-expand.cc > @@ -338,7 +338,7 @@ ix86_convert_const_wide_int_to_broadcast (machine_mod= e mode, rtx op) > machine_mode vector_mode; > if (!mode_for_vector (broadcast_mode, nunits).exists (&vector_mode)) > gcc_unreachable (); > - rtx target =3D ix86_gen_scratch_sse_rtx (vector_mode); > + rtx target =3D gen_reg_rtx (vector_mode); > bool ok =3D ix86_expand_vector_init_duplicate (false, vector_mode, > target, > GEN_INT (val_broadcast)); > @@ -686,7 +686,7 @@ ix86_expand_vector_move (machine_mode mode, rtx opera= nds[]) > if (!register_operand (op0, mode) > && !register_operand (op1, mode)) > { > - rtx scratch =3D ix86_gen_scratch_sse_rtx (mode); > + rtx scratch =3D gen_reg_rtx (mode); > emit_move_insn (scratch, op1); > op1 =3D scratch; > } > @@ -728,7 +728,7 @@ ix86_expand_vector_move (machine_mode mode, rtx opera= nds[]) > && !register_operand (op0, mode) > && !register_operand (op1, mode)) > { > - rtx tmp =3D ix86_gen_scratch_sse_rtx (GET_MODE (op0)); > + rtx tmp =3D gen_reg_rtx (GET_MODE (op0)); > emit_move_insn (tmp, op1); > emit_move_insn (op0, tmp); > return; > diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.= h > index bfb2198265a..71ae95ffef7 100644 > --- a/gcc/config/i386/i386-protos.h > +++ b/gcc/config/i386/i386-protos.h > @@ -50,8 +50,6 @@ extern void ix86_reset_previous_fndecl (void); > > extern bool ix86_using_red_zone (void); > > -extern rtx ix86_gen_scratch_sse_rtx (machine_mode); > - > extern unsigned int ix86_regmode_natural_size (machine_mode); > extern bool ix86_check_builtin_isa_match (unsigned int fcode); > #ifdef RTX_CODE > diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc > index 5d0e4739a84..6a8734c2346 100644 > --- a/gcc/config/i386/i386.cc > +++ b/gcc/config/i386/i386.cc > @@ -24197,15 +24197,6 @@ ix86_optab_supported_p (int op, machine_mode mod= e1, machine_mode, > } > } > > -/* Implement the TARGET_GEN_MEMSET_SCRATCH_RTX hook. Return a scratch > - register in MODE for vector load and store. */ > - > -rtx > -ix86_gen_scratch_sse_rtx (machine_mode mode) > -{ > - return gen_reg_rtx (mode); > -} > - > /* Address space support. > > This is not "far pointers" in the 16-bit sense, but an easy way > @@ -25253,9 +25244,6 @@ static bool ix86_libc_has_fast_function (int fcod= e ATTRIBUTE_UNUSED) > #undef TARGET_LIBC_HAS_FAST_FUNCTION > #define TARGET_LIBC_HAS_FAST_FUNCTION ix86_libc_has_fast_function > > -#undef TARGET_GEN_MEMSET_SCRATCH_RTX > -#define TARGET_GEN_MEMSET_SCRATCH_RTX ix86_gen_scratch_sse_rtx > - > #if CHECKING_P > #undef TARGET_RUN_TARGET_SELFTESTS > #define TARGET_RUN_TARGET_SELFTESTS selftest::ix86_run_selftests > diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi > index c4a92a5ebee..4bb48c5428c 100644 > --- a/gcc/doc/tm.texi > +++ b/gcc/doc/tm.texi > @@ -12001,13 +12001,6 @@ This function prepares to emit a conditional com= parison within a sequence > @var{bit_code} is @code{AND} or @code{IOR}, which is the op on the comp= ares. > @end deftypefn > > -@deftypefn {Target Hook} rtx TARGET_GEN_MEMSET_SCRATCH_RTX (machine_mode= @var{mode}) > -This hook should return an rtx for a scratch register in @var{mode} to > -be used when expanding memset calls. The backend can use a hard scratch > -register to avoid stack realignment when expanding memset. The default > -is @code{gen_reg_rtx}. > -@end deftypefn > - > @deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST (unsigned @v= ar{nunroll}, class loop *@var{loop}) > This target hook returns a new value for the number of times @var{loop} > should be unrolled. The parameter @var{nunroll} is the number of times > diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in > index 4075e71624c..f7ab5d48a63 100644 > --- a/gcc/doc/tm.texi.in > +++ b/gcc/doc/tm.texi.in > @@ -7787,8 +7787,6 @@ lists. > > @hook TARGET_GEN_CCMP_NEXT > > -@hook TARGET_GEN_MEMSET_SCRATCH_RTX > - > @hook TARGET_LOOP_UNROLL_ADJUST > > @defmac POWI_MAX_MULTS > diff --git a/gcc/target.def b/gcc/target.def > index f401fe148ee..1b9c882229e 100644 > --- a/gcc/target.def > +++ b/gcc/target.def > @@ -2738,15 +2738,6 @@ DEFHOOK > rtx, (rtx_insn **prep_seq, rtx_insn **gen_seq, rtx prev, int cmp_code, = tree op0, tree op1, int bit_code), > NULL) > > -DEFHOOK > -(gen_memset_scratch_rtx, > - "This hook should return an rtx for a scratch register in @var{mode} to= \n\ > -be used when expanding memset calls. The backend can use a hard scratch= \n\ > -register to avoid stack realignment when expanding memset. The default\= n\ > -is @code{gen_reg_rtx}.", > - rtx, (machine_mode mode), > - gen_reg_rtx) > - > /* Return a new value for loop unroll size. */ > DEFHOOK > (loop_unroll_adjust, > -- > 2.39.1.388.g2fc9e9ca3c >