From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qv1-xf34.google.com (mail-qv1-xf34.google.com [IPv6:2607:f8b0:4864:20::f34]) by sourceware.org (Postfix) with ESMTPS id AA684384B124 for ; Mon, 30 May 2022 20:14:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org AA684384B124 Received: by mail-qv1-xf34.google.com with SMTP id el14so4149946qvb.7 for ; Mon, 30 May 2022 13:14:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=kQaXXMzWM/r3ApEoogHnAFXHlt7gNzh/5E31g6REt6A=; b=iYPCoyT4DlWuZ8tB5rIofojNXy8AKIH6o93IH5veKLC8sRKwk3MUDcqsTezRpcKXV6 cyDuEpqlXsvOMP+tsLCEt0OwpuwogJBsCcqnwCGsGneNBU9l5D0i1vVhDpTP7LPIY+1b PCgF6QK/NMirlTBTE7FIpc0wdzFiuOds1hHf8XJdb5aI76SnNu7bZYdGc89HYwtTIqqt JZtuIdjgVfBGRJsTMrZ8+UpGb2XdBbI0TCuq5c9+o2w6CaP/fcq1SC7lYlsuzURa9sUd SAqz0+48YgSuuBoq9bhps3R07d6ffrcN83028nC0RStE80nL+GzQdUKmXuAr3QyCgAZv mLYw== X-Gm-Message-State: AOAM530wBfieLj+zh43ClZEd0S28RSJVwqCLwXTWaIkjqIE1aMGB/Qwc nxUBIvFfE/WyCsIlXfjy7OJLkvzb5H9IQU8nkgQJJFyOaUc= X-Google-Smtp-Source: ABdhPJwyO8SRq6JWtJ3xO8jc93OrOl2BxJcTKQCrYkDQ/1rkhfl1eyDq9O0obRqN9bacjUDIA9KeEqVYnaDzrx225QY= X-Received: by 2002:a05:6214:20e6:b0:45d:403f:7a90 with SMTP id 6-20020a05621420e600b0045d403f7a90mr47038370qvk.1.1653941645009; Mon, 30 May 2022 13:14:05 -0700 (PDT) MIME-Version: 1.0 References: <001d01d87428$58e9c9a0$0abd5ce0$@nextmovesoftware.com> In-Reply-To: From: Uros Bizjak Date: Mon, 30 May 2022 22:13:54 +0200 Message-ID: Subject: Re: [x86 PATCH] Allow SCmode and DImode to be tieable on TARGET_64BIT. To: Roger Sayle Cc: GCC Patches Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 May 2022 20:14:06 -0000 On Mon, May 30, 2022 at 10:12 PM Uros Bizjak wrote: > > On Mon, May 30, 2022 at 3:22 PM Roger Sayle wrote: > > > > > > This patch is a form of insurance policy in case my patch for PR 7061 runs > > into problems on non-x86 targets; the middle-end can add an extra check > > that the backend is happy placing SCmode and DImode values in the same > > register, before creating a SUBREG. Unfortunately, ix86_modes_tieable_p > > currently claims this is not allowed(?), even though the default target > > hook for modes_tieable_p is to always return true [i.e. false can be > > used to specifically prohibit bad combinations], and the x86_64 ABI > > passes SCmode values in DImode registers!. This makes the backend's > > modes_tiable_p hook a little more forgiving, and additionally enables > > interconversion between SCmode and V2SFmode, and between DCmode and > > VD2Fmode, which opens interesting opportunities in the future. > > > > I believe there should currently be no code generation differences > > with this change. This patch has been tested on x86_64-pc-linux-gnu > > with make bootstrap and make -k check, both with and without > > --target_board=unix{-m32}, with no new failures. Ok for mainline? > > > > > > 2022-05-30 Roger Sayle > > > > gcc/ChangeLog > > * config/i386/i386.cc (ix86_modes_tieable_p): Allow SCmode to be > > tieable with DImode on TARGET_64BIT, and SCmode tieable with > > V2SFmode, and DCmode with V2DFmode. > > I *think* this is OK, but hard to say for sure without some testcases. > Please note that x86_64 ABI passes SDmode in two separate XMM > registers. I meant DCmode here. Uros.