From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by sourceware.org (Postfix) with ESMTPS id 790DB3858D20 for ; Thu, 11 Apr 2024 20:37:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 790DB3858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 790DB3858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::22a ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1712867873; cv=none; b=M/dwEilb752kw1EMggqXxJ3D758e7/iOLmoMOJUsyfPBk36FONq2tC0ya2iQ+X1mvoMBcAoaNaddyVCebkqJomKP2OeUfi2yFyDH/SOkrbKy/SYAxlJo4QO32hnKC2wf1LuubusNc+eAAwkg+uWuTrp4pRVmnt0qn5cvvcyd1cQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1712867873; c=relaxed/simple; bh=8LKuReIne5S+OhgAI+x42mwafQaTW7ZasXFEzydLvqI=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=u3eL5u1ahRxTBJ0O+CzQFJFCQOV0GSfE9pVPHqMC8oiLtvS7hbX2YJ4gXZke2lEiLuJtPDKMl1rv+Z1ALu7cuSd/BURMne4EEcjrUT+W3BJOhQ9lUZ3oA2r9RQZMHwUn4XIVqZpbXRm7VabXUwRmW8l4dPDeNx63tveT1IeTxts= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-lj1-x22a.google.com with SMTP id 38308e7fff4ca-2da08b07157so107241fa.1 for ; Thu, 11 Apr 2024 13:37:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1712867869; x=1713472669; darn=gcc.gnu.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=oAPyF0uVYkZ1PtVMw6Ri3Ov9Bxp/rZ5t4QEpXeTfzh4=; b=ajM2l8gVEwV/oHsxLNfG6GaN8QPxnvWLvjjVIrendpXLpg+XHse55EjKIt9gIMt7Xx WJBPUlmX+Upk2RU0eJw3czZhni7qLVxypUGD7FUVUxwcdjGXv7mz53fjduh2Cl0MT9PZ Aih3vC78WqXWpI8W3EgO55vlBDmFdUM2MQzcjeNyJNz7Mt03KyIQgPsx2nAlmbKA8hsu iF7h0hbL2YbeR00t0Pb6w5yEgZqnNr0Hio7IQnQvH387bHpr+qIIs/uDKV+tbrno8p1+ 8JMdT2eOD906O8Fx4zSsHADFytmYASsaGL54un2jDac+ZhIiYK0DoG4uM80ONa/oOgZh 5PMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1712867869; x=1713472669; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oAPyF0uVYkZ1PtVMw6Ri3Ov9Bxp/rZ5t4QEpXeTfzh4=; b=Bn2Q/hvNSKKyqyptf5aZuMZH+E4mtnEmHAYzB+ip2OJ138j2PPtKPoupdAnQ7rxOB4 kdSJnHDHiQeOjvlKwbON8aeN5OLQPkT7vMYJTSqQOtYvjjj4rvbay2qhHHiFpnHUrZ9V F5Qhml/yiPgEe4S+/Vx9F1jqO7t4b6rKjGcxcldEF3XDcFdj+ApHMtaIHpD19M61tEhq uOh2xsw5SGRJFU2JYIY4rKwgFC/3IOmv2xBfB6JnujIbwjOA+9ij/WrWOhkskGckjR+N BEs4lrsgkM3BnrTUaji1PFeqiimNSCp1lyMKCQmrYSOVlaDeUzF7rhDsO40vQMuDDdXF EXBQ== X-Gm-Message-State: AOJu0YypgvjPYV8qv5sriJAdr+LAEQj30A93NBnSlk1deDSMxBWSjyvy cXp6K4OJoqAHRGt+gvGbxdS/MeAotN+HUodiSTB+qKDdE+merhUVBu6gh3ZJJx22E7YwBLyrTpz MxVmTeWI78Y+AyXI9t8FLJIU2vMs= X-Google-Smtp-Source: AGHT+IGBL07GZ5K/gvxVvykG09LcYnM5J2xYVHTiiUdwucxf6ZYMdKgnk1VKZPdSOXcr6gbKjE8BAKlAbZIAkRBELnU= X-Received: by 2002:a2e:be8b:0:b0:2da:357:ad29 with SMTP id a11-20020a2ebe8b000000b002da0357ad29mr284127ljr.19.1712867868613; Thu, 11 Apr 2024 13:37:48 -0700 (PDT) MIME-Version: 1.0 References: <20240410175227.GN19790@gate.crashing.org> <20240411140002.GO19790@gate.crashing.org> In-Reply-To: <20240411140002.GO19790@gate.crashing.org> From: Uros Bizjak Date: Thu, 11 Apr 2024 22:37:36 +0200 Message-ID: Subject: Re: Combine patch ping To: Segher Boessenkool Cc: "gcc-patches@gcc.gnu.org" , Jeff Law , Richard Biener Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, Apr 11, 2024 at 4:02=E2=80=AFPM Segher Boessenkool wrote: > > On Wed, Apr 10, 2024 at 08:32:39PM +0200, Uros Bizjak wrote: > > On Wed, Apr 10, 2024 at 7:56=E2=80=AFPM Segher Boessenkool > > wrote: > > > This is never okay. You cannot commit a patch without approval, *eve= r*. > > This is the biggest issue, to start with. It is fundamental. > > > > That patch is also obvious -- obviously *wrong*, that is. There are > > > big assumptions everywhere in the compiler how a CC reg can be used. > > > This violates that, as explained elsewhere. > > > > Can you please elaborate what is wrong with this concrete patch. > > The explanation of the patch is contradictory to how RTL works at all, > so it is just wrong. It might even do something sane, but I didn't get > that far at all! The commit message explains the problem, the solution is explained in the last couple of lines. Please see [1] for a more thorough explanation of the problem. [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112560#c13 > Write good email explanations, and a good proposed commit message. > Please. It is the only one people can judge a patch. Well, apart > from doing everything myself from first principles, ignoring everything > you said, just looking at the patch itself, but that is a hundred times > more work. I don't do that. > > > The > > part that the patch touches has several wrong assumptions, and the > > fixed "???" comment just emphasizes that. I don't see what is wrong > > with: > > > > (define_insn "@pushfl2" > > [(set (match_operand:W 0 "push_operand" "=3D<") > > (unspec:W [(match_operand 1 "flags_reg_operand")] > > UNSPEC_PUSHFL))] > > "GET_MODE_CLASS (GET_MODE (operands[1])) =3D=3D MODE_CC" > > "pushf{}" > > [(set_attr "type" "push") > > (set_attr "mode" "")]) > > What does it even mean? What is a flags:CC? You always always always > need to say what is *in* the flags, if you want to use it as input > (which is what unspec does). CC is weird like this. Most targets do > not have distinct physical flags for every condition, only a few > conditions are "alive" at any point in the program! >From our previous discussion, we concluded that "use" means cc-compared-to-0, but we also need a "copy" operation, to be able to move CC reg around as a physical register (e.g. sahf, lahf, pushfl, popfl instructions). This is a register that contains the state of the CPU, described in [1] , not some RTL concept. The register is even listed in i386.md: (FLAGS_REG 17) with the "mode" that defines the value in the register more precisely. [1] https://en.wikipedia.org/wiki/FLAGS_register > > > it is just a push of the flags reg to the stack. If the push can't be > > described in this way, then it is the middle end at fault, we can't > > just change modes at will. > > But that is not what this describes: it operates on the flags register > in some unspecified way, and pushes the result of *that* to the stack. No, the "use" is defined as cc-compared-to-0. The above is a "copy" operation, the register that holds the state of the CPU is pushed on the stack (and can be later popped from the stack to reload the saved state). The pushfl instruction does not use the register in the sense that it examines its contents. > (Stack pointer modification is not described here btw, should it be? Is > that magically implemented by the backend some way, via type=3Dpush > perhaps?) Please see gen_pushfl() in i386.cc that emits the pattern: #(insn:TI 5 2 6 2 (set (mem:DI (pre_dec:DI (reg/f:DI 7 sp)) [0 S8 A8]) # (unspec:DI [ # (reg:CC 17 flags) # ] UNSPEC_PUSHFL)) "flags.c":3:10 70 {pushfldi2} # (expr_list:REG_DEAD (reg:CC 17 flags) # (nil))) pushfq # 5 [c=3D4 l=3D1] pushfldi2 Uros.