From: Uros Bizjak <ubizjak@gmail.com>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: [committed] i386: Micro-optimize ix86_expand_sse_extend
Date: Sun, 20 Aug 2023 17:57:29 +0200 [thread overview]
Message-ID: <CAFULd4YRkEBSRFm3AtTYmbPtANLbnGGHcvwBSq=RRc2Zv7ii3g@mail.gmail.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 598 bytes --]
Partial vector src is forced to a register as ops[1], we can use it
instead of SRC in the call to ix86_expand_sse_cmp. This change avoids
forcing operand[1] to a register in sign/zero-extend expanders.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
instead of src in the call to ix86_expand_sse_cmp.
* config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
force operands[1] to a register.
(<any_extend:insn>v4hiv4si2): Ditto.
(<any_extend:insn>v2siv2di2): Ditto.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Uros.
[-- Attachment #2: p.diff.txt --]
[-- Type: text/plain, Size: 1622 bytes --]
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 460d496ef22..031e2f72d15 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -5667,7 +5667,7 @@ ix86_expand_sse_extend (rtx dest, rtx src, bool unsigned_p)
ops[2] = force_reg (imode, CONST0_RTX (imode));
else
ops[2] = ix86_expand_sse_cmp (gen_reg_rtx (imode), GT, CONST0_RTX (imode),
- src, pc_rtx, pc_rtx);
+ ops[1], pc_rtx, pc_rtx);
ix86_split_mmx_punpck (ops, false);
emit_move_insn (dest, lowpart_subreg (GET_MODE (dest), ops[0], imode));
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 87c3bf07020..da85223a9b4 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -22923,8 +22923,7 @@ (define_expand "<insn>v8qiv8hi2"
{
if (!TARGET_SSE4_1)
{
- rtx op1 = force_reg (V8QImode, operands[1]);
- ix86_expand_sse_extend (operands[0], op1, <u_bool>);
+ ix86_expand_sse_extend (operands[0], operands[1], <u_bool>);
DONE;
}
@@ -23240,8 +23239,7 @@ (define_expand "<insn>v4hiv4si2"
{
if (!TARGET_SSE4_1)
{
- rtx op1 = force_reg (V4HImode, operands[1]);
- ix86_expand_sse_extend (operands[0], op1, <u_bool>);
+ ix86_expand_sse_extend (operands[0], operands[1], <u_bool>);
DONE;
}
@@ -23846,8 +23844,7 @@ (define_expand "<insn>v2siv2di2"
{
if (!TARGET_SSE4_1)
{
- rtx op1 = force_reg (V2SImode, operands[1]);
- ix86_expand_sse_extend (operands[0], op1, <u_bool>);
+ ix86_expand_sse_extend (operands[0], operands[1], <u_bool>);
DONE;
}
reply other threads:[~2023-08-20 15:57 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAFULd4YRkEBSRFm3AtTYmbPtANLbnGGHcvwBSq=RRc2Zv7ii3g@mail.gmail.com' \
--to=ubizjak@gmail.com \
--cc=gcc-patches@gcc.gnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).