From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt1-x836.google.com (mail-qt1-x836.google.com [IPv6:2607:f8b0:4864:20::836]) by sourceware.org (Postfix) with ESMTPS id 739F63856099 for ; Mon, 6 Jun 2022 11:28:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 739F63856099 Received: by mail-qt1-x836.google.com with SMTP id p8so10076642qtx.9 for ; Mon, 06 Jun 2022 04:28:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=m4NQXK5ewMW63QviFPOZ0GE0QwwiCU2WYdWTuaBUDtM=; b=y3EktH5F3LWCWZsG8WBSPt6/wrKBk7tJ+LDvDHpOQBmexxeHQPHpmq4D3DLitQyGNV u1/ZG8ZXD7HMY2ZMN3k7FOMAq12RwUwnGjT3hsab2g835ope46bCbNbrcKABXZ2AG480 Ywa7NLcAi5ZFJb4mjIAQIoFx1N4XquB8HYH/kKO8UNm0CoLPqCI9qekJUnYoAPVmp4wI v9g+l0BT1jk3/5LOEue/VAZo8pHUNIktCJ5j5MmafH6FQS03GWom/KcVJ/byG8G3foaH kFERCyCgyT002mlPlOUISXjbNY4TItdrrx9J1Zf3rft80y4/aFVZczcr2VxwjBCvr8mW FemA== X-Gm-Message-State: AOAM531WkHzcnWCnXJR2TKwnowNuNce6KimYLlVaNSRqoY+uZbu7t5MJ OZpME/prxZNliJxWSxLvd+LIg4/4qBVZFCwA7s0= X-Google-Smtp-Source: ABdhPJyNSXFl0BNKtX0js+sEvniM2cPUQl+J51WcA28ZV8az7OVazKxbI5QkLC2X8cHW+R6k2llH0q3mDv2fFGzgXVE= X-Received: by 2002:a05:622a:5cc:b0:304:b3d8:4bd with SMTP id d12-20020a05622a05cc00b00304b3d804bdmr18014967qtb.569.1654514902091; Mon, 06 Jun 2022 04:28:22 -0700 (PDT) MIME-Version: 1.0 References: <016e01d87900$615a7a30$240f6e90$@nextmovesoftware.com> In-Reply-To: <016e01d87900$615a7a30$240f6e90$@nextmovesoftware.com> From: Uros Bizjak Date: Mon, 6 Jun 2022 13:28:11 +0200 Message-ID: Subject: Re: [x86 PATCH] Double word implementation of and; cmp to not; test optimization. To: Roger Sayle Cc: GCC Patches Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Jun 2022 11:28:25 -0000 On Sun, Jun 5, 2022 at 7:19 PM Roger Sayle wrote: > > > This patch extends the recent and;cmp to not;test optimization to also > perform this transformation for TImode on TARGET_64BIT and DImode on -m32, > One motivation for this is that it's a step to fixing the current failure > of gcc.target/i386/pr65105-5.c on -m32. > > A more direct benefit for x86_64 is that the following code: > > int foo(__int128 x, __int128 y) > { > return (x & y) == y; > } > > improves (with -O2 -mbmi) from: > > movq %rdi, %r8 > movq %rsi, %rdi > movq %rdx, %rsi > andq %rcx, %rdi > movq %r8, %rax > andq %rdx, %rax > movq %rdi, %rdx > xorq %rsi, %rax > xorq %rcx, %rdx > orq %rdx, %rax > sete %al > movzbl %al, %eax > ret > > to the much better: > > movq %rdi, %r8 > movq %rsi, %rdi > andn %rdx, %r8, %rax > andn %rcx, %rdi, %rsi > orq %rsi, %rax > sete %al > movzbl %al, %eax > ret > > The major theme of this patch is to generalize many of i386.md's > *di3_doubleword patterns to become *_doubleword patterns, i.e. > whenever there exists a "double word" optimization for DImode with -m32, > there should be an equivalent TImode optimization on TARGET_64BIT. > > The following patch has been tested on x86_64-pc-linux-gnu with > make bootstrap and make -k check, where on TARGET_64BIT there are > no new failures, but paradoxically with --target_board=unix{-m32} > the other dg-final clause in gcc.target/i386/pr65105-5.c now fails. > Counter-intuitively, this is progress, and pr65105-5.c may now be > fixed (without using peephole2) simply by tweaking the STV pass to > handle andn/test (in a follow-up patch). > OK for mainline? > > > 2022-06-05 Roger Sayle > > gcc/ChangeLog > * config/i386/i386.cc (ix86_rtx_costs) : Provide costs > for double word comparisons and tests (comparisons against zero). > * config/i386/i386.md (*test_not_doubleword): Split DWI > and;cmp into andn;cmp $0 as a pre-reload splitter. > (define_expand and3): Generalize from SWIM1248x to SWIDWI. > (define_insn_and_split "*anddi3_doubleword"): Rename/generalize... > (define_insn_and_split "*and3_doubleword"): ... to this. > (define_insn "*andndi3_doubleword"): Rename and generalize... > (define_insn "*andn3_doubleword): ... to this. > (define_split): Split andn when TARGET_BMI for both modes. > (define_split): Split andn when !TARGET_BMI for both modes. > (define_expand 3): Generalize from SWIM1248x to > SWIDWI. > (define_insn_and_split "*3_doubleword): Generalize > from DI mode to both modes. > > gcc/testsuite/ChangeLog > * gcc.target/i386/testnot-3.c: New test case. (define_expand "and3" - [(set (match_operand:SWIM1248x 0 "nonimmediate_operand") - (and:SWIM1248x (match_operand:SWIM1248x 1 "nonimmediate_operand") - (match_operand:SWIM1248x 2 "")))] + [(set (match_operand:SWIDWI 0 "nonimmediate_operand") + (and:SWIDWI (match_operand:SWIDWI 1 "nonimmediate_operand") + (match_operand:SWIDWI 2 "")))] SWIM1248x should be changed to SDWIM mode iterator, not SWIDWI: ;; Math-dependant integer modes with DImode. (define_mode_iterator SWIM1248x [(QI "TARGET_QIMODE_MATH") (HI "TARGET_HIMODE_MATH") SI DI]) ;; All math-dependant single and double word integer modes. (define_mode_iterator SDWIM [(QI "TARGET_QIMODE_MATH") (HI "TARGET_HIMODE_MATH") SI DI (TI "TARGET_64BIT")]) but ;; SWI and DWI together. (define_mode_iterator SWIDWI [QI HI SI DI (TI "TARGET_64BIT")]) does not handle QI and HI correctly w.r.t. TARGET_[QI,HI]MODE_MATH. Uros.