From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21606 invoked by alias); 10 Jul 2019 06:39:58 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 21595 invoked by uid 89); 10 Jul 2019 06:39:58 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.1 spammy=HX-Languages-Length:1675 X-HELO: mail-io1-f66.google.com Received: from mail-io1-f66.google.com (HELO mail-io1-f66.google.com) (209.85.166.66) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 10 Jul 2019 06:39:57 +0000 Received: by mail-io1-f66.google.com with SMTP id k20so2292845ios.10 for ; Tue, 09 Jul 2019 23:39:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=vbj5i3/uXkEoEBtNM771ZDB+Rj3rte8LqND2pPOf4hc=; b=BKgPSR5bBJntpB6O5jGP4Y6MTYls+hY71+xHd0DcQi9iOaGso8dMAxjarf1rQQi1Rk YAyiMIwmFAU+CtQEvKWNexTn34dAYOzIkF4musKNYl07ufgGBQsjO7v/OSQf7TP6PMOG gabwTv/wbzK7J8qYxHQL90MWyibW6f+oR9wCzJ9fPXV1q9GvgTug1AiOepERllY2CUlR t7y8pxmxclORsNS5/r4jZ8EbL2AzMrx9H7sLDuD54Z0WsCiuT+ukWX46qhhq0+PFe+4C +Eb/PzmCajMGx3oBoYnsom/oyIfQrr5hrvB4cB6NErWqOsX1esm/okYST35CqLPzJAwo db6A== MIME-Version: 1.0 References: In-Reply-To: From: Uros Bizjak Date: Wed, 10 Jul 2019 09:03:00 -0000 Message-ID: Subject: Re: [PATCH] i386: Add AVX512 unaligned intrinsics To: Sunil Pandey Cc: "gcc-patches@gcc.gnu.org" , "H. J. Lu" Content-Type: text/plain; charset="UTF-8" X-SW-Source: 2019-07/txt/msg00758.txt.bz2 On Tue, Jul 9, 2019 at 11:44 PM Sunil Pandey wrote: > > __m512i _mm512_loadu_epi32( void * sa); > __m512i _mm512_loadu_epi64( void * sa); > void _mm512_storeu_epi32(void * d, __m512i a); > void _mm256_storeu_epi32(void * d, __m256i a); > void _mm_storeu_epi32(void * d, __m128i a); > void _mm512_storeu_epi64(void * d, __m512i a); > void _mm256_storeu_epi64(void * d, __m256i a); > void _mm_storeu_epi64(void * d, __m128i a); > > Tested on x86-64. > > OK for trunk? > > --Sunil Pandey > > > gcc/ > > PR target/90980 > * config/i386/avx512fintrin.h (__v16si_u): New data type > (__v8di_u): Likewise > (_mm512_loadu_epi32): New. > (_mm512_loadu_epi64): Likewise. > (_mm512_storeu_epi32): Likewise. > (_mm512_storeu_epi64): Likewise. > * config/i386/avx512vlintrin.h (_mm_storeu_epi32): New. > (_mm256_storeu_epi32): Likewise. > (_mm_storeu_epi64): Likewise. > (_mm256_storeu_epi64): Likewise. > > gcc/testsuite/ > > PR target/90980 > * gcc.target/i386/avx512f-vmovdqu32-3.c: New test. > * gcc.target/i386/avx512f-vmovdqu64-3.c: Likewise. > * gcc.target/i386/pr90980-1.c: Likewise. > * gcc.target/i386/pr90980-2.c: Likewise. +/* Internal data types for implementing unaligned version of intrinsics. */ +typedef int __v16si_u __attribute__ ((__vector_size__ (64), + __aligned__ (1))); +typedef long long __v8di_u __attribute__ ((__vector_size__ (64), + __aligned__ (1))); You should define only one generic __m512i_u type, something like: typedef long long __m512i_u __attribute__ ((__vector_size__ (64), __may_alias__, __aligned__ (1))); Please see avxintrin.h how __m256i_u is defined and used. Uros.