From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qv1-xf2e.google.com (mail-qv1-xf2e.google.com [IPv6:2607:f8b0:4864:20::f2e]) by sourceware.org (Postfix) with ESMTPS id E6F7C3943435 for ; Fri, 30 Jul 2021 09:32:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E6F7C3943435 Received: by mail-qv1-xf2e.google.com with SMTP id kj19so4116118qvb.0 for ; Fri, 30 Jul 2021 02:32:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Hwvc+cZui4DU+K+FlLouMoKP+b0lphHkt23NACeI/9I=; b=uEJk64zObt2ELkcbmTeyelQlwL1I4GanvhOc8a4yy0UINIZ95Tzp69bZPkp7IClRlf WKWpTNZ/+Nm6v4ullexVSsbIweifzAKYUMHcPBdqRVkMA3Jvvs+hQ+CpHnb0/1pXMTV8 +Fr963sTD0g8nA0x8yCIb095T52FbE4jKTwPdWdDTlEazYQozbrh7O6UY9E8uC7krwdL je0pteERQVdCozBSgRyEFjPADcig574ivsAQqv4XXbsLQz079kjHXwxNDnS7uVAiuXS8 kXALYOz1ch1HJC6Ny3YYlFP1kKAsY28cqmjLQ9tO6sLXqzfBAsreHK+LJsvzOzMqkWJQ LNNQ== X-Gm-Message-State: AOAM532UdCOaVj7PX7UwbE3Nj5hw8E2r/CootysxhglOSTMdwtuct8FW 8qu6kygb+dOWRiqt0AfxOOWhl+zjOoHrmzTLGCw= X-Google-Smtp-Source: ABdhPJwSbVbkt0e8PxHcc+7dNQxXyjBOOTBfw24RmMkF2DmjrPLVnatdVM/cL7DgQZ/07fC7Tq9QDcdPxiymQ5xA2EI= X-Received: by 2002:ad4:46ed:: with SMTP id h13mr1816415qvw.56.1627637544419; Fri, 30 Jul 2021 02:32:24 -0700 (PDT) MIME-Version: 1.0 References: <02a101d78211$326e66f0$974b34d0$@nextmovesoftware.com> In-Reply-To: <02a101d78211$326e66f0$974b34d0$@nextmovesoftware.com> From: Uros Bizjak Date: Fri, 30 Jul 2021 11:32:13 +0200 Message-ID: Subject: Re: [x86_64 PATCH] Decrement followed by cmov improvements. To: Roger Sayle Cc: GCC Patches Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Jul 2021 09:32:26 -0000 On Mon, Jul 26, 2021 at 1:27 PM Roger Sayle wrote: > > > The following patch to the x86_64 backend improves the code generated > for a decrement followed by a conditional move. The primary change is > to recognize that after subtracting one, checking the result is -1 (or > equivalently that the original value was zero) can be implemented using > the borrow/carry flag instead of requiring an explicit test instruction. > This is achieved by a new define_insn_and_split that allows combine to > split the desired sequence/composite into a *subsi_3 and *movsicc_noc. > > The other change with this patch is/are a pair of peephole2 optimizations > to eliminate register-to-register moves generated during register > allocation. During reload, the compiler doesn't know that inverting > the condition of a conditional cmove can sometimes reduce register > pressure, but this is easy to tidy up during the peephole2 pass (where > swapping the order of the insn's operands performs the required > logic inversion). > > Both improvements are demonstrated by the case below: > > int foo(int x) { > if (x == 0) > x = 16; > else x--; > return x; > } > > Before: > foo: leal -1(%rdi), %eax > testl %edi, %edi > movl $16, %edx > cmove %edx, %eax > ret > > After: > foo: subl $1, %edi > movl $16, %eax > cmovnc %edi, %eax > ret > > And the value of the peephole2 clean-up can be seen on its own in: > > int bar(int x) { > x--; > if (x == 0) > x = 16; > return x; > } > > Before: > bar: movl %edi, %eax > movl $16, %edx > subl $1, %eax > cmove %edx, %eax > ret > > After: > bar: subl $1, %edi > movl $16, %eax > cmovne %edi, %eax > ret > > These idioms were inspired by the source code of NIST SciMark4's > Random_nextDouble function, where the tweaks above result in > a ~1% improvement in the MonteCarlo benchmark kernel. > > This patch has been tested on x86_64-pc-linux-gnu with a > "make boostrap" and "make -k check" with no new failures. > > Ok for mainline? > > > 2021-07-26 Roger Sayle > > gcc/ChangeLog > * config/i386/i386.md (*dec_cmov): New define_insn_and_split > to generate a conditional move using the carry flag after sub $1. > (peephole2): Eliminate a register-to-register move by inverting > the condition of a conditional move. > > gcc/testsuite/ChangeLog > * gcc.target/i386/dec-cmov-1.c: New test. > * gcc.target/i386/dec-cmov-2.c: New test. Please also allow ia32 in the testcases. #ifdef __x86_64__ 64bit specific (long long) tests and add: /* { dg-additional-options "-march=pentiumpro -mregparm=3" { target ia32 } } */ (cmov generation uses ancient ix86_arch_features, it gets enabled by using -march=pentiumpro). OK with the above change. Thanks, Uros.