From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qk1-x72f.google.com (mail-qk1-x72f.google.com [IPv6:2607:f8b0:4864:20::72f]) by sourceware.org (Postfix) with ESMTPS id 842253858418 for ; Sun, 5 Jun 2022 19:17:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 842253858418 Received: by mail-qk1-x72f.google.com with SMTP id az35so2415641qkb.3 for ; Sun, 05 Jun 2022 12:17:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=B3J9kv8K3jmRUVV8w510t9TYZ5stPzrbLsUFkgZyL3c=; b=L39dmxjSMA27p/2UowtrYOMimxz+0LZlo8NcyhMbznWC349r1F1Prq+KP+9m3IQvkd ZQeXQ3R+1s4bbHF5FRV/QKG0Wc3cP0loQrFds6TbIfErs+LYTIV+4onlZSn1rW20nzFM 5LUI70Sl3xOGQT94WILL87akDOWB4QGKnUmgs9t/1luyvEa9PDIWH/x35rcy2GbkG55i kX61JjremhroVG1v2/+XF29Yh/QAb/hG7zOFdRbgqtmBjsk+82hOYrcCJPQ0cEA8FRE1 kc3VB5Kal1rjz0hwGkMtEFLDDgkwblMJpCAVQD/6bWDTZarOHKy9ZaNPR6l3ZrymYP5l YD8Q== X-Gm-Message-State: AOAM531FvX1oWZ5V+GZnxxbBn7Ga2sg3EWMd9/VHV4tXZNcb7v4kM/ge P0CoExW0l89i4TSrkqW/6K8s11d9IrB3V732LAs= X-Google-Smtp-Source: ABdhPJwtIYjOA5lKqmzyHZMUyJPxYewjshI2hd9vaWJds30y1AM7VoKUBCk97JlKfZSxRrLuMoyMKk3471tTEiuijM8= X-Received: by 2002:a05:620a:2903:b0:6a0:4d8f:8b88 with SMTP id m3-20020a05620a290300b006a04d8f8b88mr13745793qkp.328.1654456627848; Sun, 05 Jun 2022 12:17:07 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Uros Bizjak Date: Sun, 5 Jun 2022 21:16:56 +0200 Message-ID: Subject: Re: [PATCH] x86: harmonize __builtin_ia32_psadbw*() types To: Jan Beulich Cc: "gcc-patches@gcc.gnu.org" , "hubicka@ucw.cz" , Hongtao Liu , "H. J. Lu" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Jun 2022 19:17:10 -0000 On Thu, Jun 2, 2022 at 5:04 PM Jan Beulich wrote: > > The 64-bit, 128-bit, and 512-bit variants have VDI return type, in > line with instruction behavior. Make the 256-bit builtin match, thus > also making it match the insn it expands to (using VI8_AVX2_AVX512BW). > > gcc/ > > * config/i386/i386-builtin.def (__builtin_ia32_psadbw256): > Change type. > * config/i386/i386-builtin-types.def: New function type > (V4DI, V32QI, V32QI). > * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle > V4DI_FTYPE_V32QI_V32QI. LGTM, but please let HJ have the final approval. Uros. > > --- a/gcc/config/i386/i386-builtin.def > +++ b/gcc/config/i386/i386-builtin.def > @@ -1217,7 +1217,7 @@ BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_mulv8si3, "__builtin_ia32_pmulld256" , IX86_BUILTIN_PMULLD256 , UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI) > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_vec_widen_umult_even_v8si, "__builtin_ia32_pmuludq256", IX86_BUILTIN_PMULUDQ256, UNKNOWN, (int) V4DI_FTYPE_V8SI_V8SI) > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_iorv4di3, "__builtin_ia32_por256", IX86_BUILTIN_POR256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI) > -BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_psadbw, "__builtin_ia32_psadbw256", IX86_BUILTIN_PSADBW256, UNKNOWN, (int) V16HI_FTYPE_V32QI_V32QI) > +BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_psadbw, "__builtin_ia32_psadbw256", IX86_BUILTIN_PSADBW256, UNKNOWN, (int) V4DI_FTYPE_V32QI_V32QI) > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pshufbv32qi3, "__builtin_ia32_pshufb256", IX86_BUILTIN_PSHUFB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pshufdv3, "__builtin_ia32_pshufd256", IX86_BUILTIN_PSHUFD256, UNKNOWN, (int) V8SI_FTYPE_V8SI_INT) > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pshufhwv3, "__builtin_ia32_pshufhw256", IX86_BUILTIN_PSHUFHW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_INT) > --- a/gcc/config/i386/i386-builtin-types.def > +++ b/gcc/config/i386/i386-builtin-types.def > @@ -516,6 +516,7 @@ DEF_FUNCTION_TYPE (V8DI, V8DI, V2DI, INT > DEF_FUNCTION_TYPE (V8DI, V8DI, V2DI, INT, V8DI, UQI) > DEF_FUNCTION_TYPE (V8DI, V8DI, V4DI, INT, V8DI, UQI) > DEF_FUNCTION_TYPE (V4DI, V8SI, V8SI) > +DEF_FUNCTION_TYPE (V4DI, V32QI, V32QI) > DEF_FUNCTION_TYPE (V8DI, V64QI, V64QI) > DEF_FUNCTION_TYPE (V4DI, V4DI, V2DI) > DEF_FUNCTION_TYPE (V4DI, PCV4DI, V4DI) > --- a/gcc/config/i386/i386-expand.cc > +++ b/gcc/config/i386/i386-expand.cc > @@ -10359,6 +10359,7 @@ ix86_expand_args_builtin (const struct b > case V8SI_FTYPE_V16HI_V16HI: > case V4DI_FTYPE_V4DI_V4DI: > case V4DI_FTYPE_V8SI_V8SI: > + case V4DI_FTYPE_V32QI_V32QI: > case V8DI_FTYPE_V64QI_V64QI: > if (comparison == UNKNOWN) > return ix86_expand_binop_builtin (icode, exp, target); >