From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qk1-x72f.google.com (mail-qk1-x72f.google.com [IPv6:2607:f8b0:4864:20::72f]) by sourceware.org (Postfix) with ESMTPS id E68EB3861800 for ; Fri, 11 Jun 2021 09:34:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E68EB3861800 Received: by mail-qk1-x72f.google.com with SMTP id c124so30281645qkd.8 for ; Fri, 11 Jun 2021 02:34:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=7ewjFRQcMCDIn/x0YjL9cFXpxUXjgm58Pobv8WQYTTA=; b=HPQJ6Yfi9E0DJRoVitMq9KaLfc8flw/PGhlj7IaccPlF+4MawJSXagl6eSZRWgU2je wIyPqu+fcQK0GV8lSMmz1B/IEbyHDeo+m8h7AZ7O4NKOoL1UwPhH7qCVV+DdAt0CjMMu vRBx7VIG8+L7UPwCQhL4cw1cnFtQBDpM5vM9GVpxUTmgBT+Mmqx+FcSpQD+/8QzbXpQq Az1Gm/7V6vKZEaT5tJYYI9EmVwtUjuoB8UtJJeDXHxNf2cYahw/QB7jX3ycXT3guelis ABrIi231Ap8m8wDnZVk+3TdYiJlGbGdvooYME4Dz87JG3Lz7iVjmqOqJ22XY6gpBu9kn jAMA== X-Gm-Message-State: AOAM533Zccoc3oldNufV9oNsPaxQqwmEw9s0xODFLJfZrI++SvKWV2+a W3+rmQr59Ytq+U147jypxnI0uKbotzIb4/V8FZI= X-Google-Smtp-Source: ABdhPJzKIxXumw+Rhbn74xeey4Z259dwtdqQrcQKOf726RGejZZTQ4cKEQujRgC/LjBaAT04r8MSzSO/qU10IKXpVvY= X-Received: by 2002:a37:94e:: with SMTP id 75mr2825784qkj.127.1623404080360; Fri, 11 Jun 2021 02:34:40 -0700 (PDT) MIME-Version: 1.0 References: <20210611085939.GN7746@tucnak> In-Reply-To: <20210611085939.GN7746@tucnak> From: Uros Bizjak Date: Fri, 11 Jun 2021 11:34:28 +0200 Message-ID: Subject: Re: [PATCH] i386: Fix up *vec_concat_0_1 [PR101007] To: Jakub Jelinek Cc: Hongtao Liu , GCC Patches Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 11 Jun 2021 09:34:42 -0000 On Fri, Jun 11, 2021 at 10:59 AM Jakub Jelinek wrote: > > On Fri, Apr 23, 2021 at 12:53:58PM +0800, Hongtao Liu via Gcc-patches wrote: > > -(define_insn "*vec_concatv4si_0" > > - [(set (match_operand:V4SI 0 "register_operand" "=v,x") > > - (vec_concat:V4SI > > - (match_operand:V2SI 1 "nonimmediate_operand" "vm,?!*y") > > - (match_operand:V2SI 2 "const0_operand" " C,C")))] > > +(define_insn "*vec_concat_0" > > + [(set (match_operand:VI124_128 0 "register_operand" "=v,x") > > + (vec_concat:VI124_128 > > + (match_operand: 1 "nonimmediate_operand" "vm,?!*y") > > + (match_operand: 2 "const0_operand" " C,C")))] > > "TARGET_SSE2" > > "@ > > %vmovq\t{%1, %0|%0, %1} > > @@ -22154,6 +22157,24 @@ (define_insn "avx_vec_concat" > > (set_attr "prefix" "maybe_evex") > > (set_attr "mode" "")]) > > > > +(define_insn_and_split "*vec_concat_0" > > + [(set (match_operand:V 0 "register_operand") > > + (vec_select:V > > + (vec_concat: > > + (match_operand:V 1 "nonimmediate_operand") > > + (match_operand:V 2 "const0_operand")) > > + (match_parallel 3 "movq_parallel" > > + [(match_operand 4 "const_int_operand")])))] > > + "ix86_pre_reload_split ()" > > + "#" > > + "&& 1" > > + [(set (match_dup 0) > > + (vec_concat:V (match_dup 1) (match_dup 5)))] > > +{ > > + operands[1] = gen_lowpart (mode, operands[1]); > > + operands[5] = CONST0_RTX (mode); > > +}) > > This regressed the following testcase with -msse -mno-sse2. > The define_insn_and_split splits the permutation into *vec_concat_0 > or *vec_concatv2di_0 insns which both have TARGET_SSE2 in their > conditions (for the former you can see it above), but the > define_insn_and_split matches always when the V mode's condition do, > which for V16QI/V8HI/V4SI/V2DI/V4SF modes is always (well, when those > modes are valid, which is TARGET_SSE). > > Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, > ok for trunk? > > 2021-06-11 Jakub Jelinek > > PR target/101007 > * config/i386/sse.md (*vec_concat_0_1): Require TARGET_SSE2. > > * gcc.target/i386/sse-pr101007.c: New test. OK, even as obvious patch. Thanks, Uros. > --- gcc/config/i386/sse.md.jj 2021-06-07 09:24:57.706689972 +0200 > +++ gcc/config/i386/sse.md 2021-06-10 11:14:52.407588679 +0200 > @@ -22395,7 +22395,7 @@ (define_insn_and_split "*vec_concat (match_operand:V 2 "const0_operand")) > (match_parallel 3 "movq_parallel" > [(match_operand 4 "const_int_operand")])))] > - "ix86_pre_reload_split ()" > + "TARGET_SSE2 && ix86_pre_reload_split ()" > "#" > "&& 1" > [(set (match_dup 0) > --- gcc/testsuite/gcc.target/i386/sse-pr101007.c.jj 2021-06-10 11:41:25.818609527 +0200 > +++ gcc/testsuite/gcc.target/i386/sse-pr101007.c 2021-06-10 11:38:39.301910017 +0200 > @@ -0,0 +1,14 @@ > +/* PR target/101007 */ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -msse -mno-sse2" } */ > + > +typedef unsigned __attribute__((__vector_size__ (8))) U; > +typedef unsigned __attribute__((__vector_size__ (16))) V; > +V v; > +U *p; > + > +void > +foo (void) > +{ > + *p = (U) __builtin_shufflevector ((V)(0 == (V){} >= 0), v, 4, 2); > +} > > Jakub >