Re: [PATCH 36/41] Prevent allocation of MMX registers with TARGET_MMX_WITH_SSE

[Uros Bizjak <ubizjak@gmail.com>]

On Sat, Feb 16, 2019 at 11:46 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> From: Uros Bizjak <ubizjak@gmail.com>
>
> 2019-02-14  Uroš Bizjak  <ubizjak@gmail.com>
>
>         PR target/89021
>         * config/i386/i386.md (*zero_extendsidi2): Add mmx_isa attribute.
>         * config/i386/sse.md (*vec_concatv2sf_sse4_1): Ditto.
>         (*vec_concatv2sf_sse): Ditto.
>         (*vec_concatv2si_sse4_1): Ditto.
>         (*vec_concatv2si): Ditto.
>         (*vec_concatv4si_0): Ditto.
>         (*vec_concatv2di_0): Ditto.

It looks like I forgot to add sse2_cvtpi2pd, sse2_cvtpd2pi and sse2_cvttpd2pi.

Uros.

> ---
>  gcc/config/i386/i386.md |  4 ++++
>  gcc/config/i386/sse.md  | 16 ++++++++++++++--
>  2 files changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
> index 04ec0eeaa57..4cbbd4cf685 100644
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -3683,6 +3683,10 @@
>               (const_string "avx512bw")
>            ]
>            (const_string "*")))
> +   (set (attr "mmx_isa")
> +     (if_then_else (eq_attr "alternative" "5,6")
> +                  (const_string "native")
> +                  (const_string "*")))
>     (set (attr "type")
>       (cond [(eq_attr "alternative" "0,1,2,4")
>               (const_string "multi")
> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> index 97ec3795b82..4b415d255e0 100644
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -7209,6 +7209,10 @@
>               (const_string "mmxmov")
>            ]
>            (const_string "sselog")))
> +   (set (attr "mmx_isa")
> +     (if_then_else (eq_attr "alternative" "7,8")
> +                  (const_string "native")
> +                  (const_string "*")))
>     (set (attr "prefix_data16")
>       (if_then_else (eq_attr "alternative" "3,4")
>                    (const_string "1")
> @@ -7244,7 +7248,8 @@
>     movss\t{%1, %0|%0, %1}
>     punpckldq\t{%2, %0|%0, %2}
>     movd\t{%1, %0|%0, %1}"
> -  [(set_attr "type" "sselog,ssemov,mmxcvt,mmxmov")
> +  [(set_attr "mmx_isa" "*,*,native,native")
> +   (set_attr "type" "sselog,ssemov,mmxcvt,mmxmov")
>     (set_attr "mode" "V4SF,SF,DI,DI")])
>
>  (define_insn "*vec_concatv4sf"
> @@ -14520,6 +14525,10 @@
>     punpckldq\t{%2, %0|%0, %2}
>     movd\t{%1, %0|%0, %1}"
>    [(set_attr "isa" "noavx,noavx,avx,avx512dq,noavx,noavx,avx,*,*,*")
> +   (set (attr "mmx_isa")
> +     (if_then_else (eq_attr "alternative" "8,9")
> +                  (const_string "native")
> +                  (const_string "*")))
>     (set (attr "type")
>       (cond [(eq_attr "alternative" "7")
>               (const_string "ssemov")
> @@ -14557,6 +14566,7 @@
>     punpckldq\t{%2, %0|%0, %2}
>     movd\t{%1, %0|%0, %1}"
>    [(set_attr "isa" "sse2,sse2,*,*,*,*")
> +   (set_attr "mmx_isa" "*,*,*,*,native,native")
>     (set_attr "type" "sselog,ssemov,sselog,ssemov,mmxcvt,mmxmov")
>     (set_attr "mode" "TI,TI,V4SF,SF,DI,DI")])
>
> @@ -14586,7 +14596,8 @@
>    "@
>     %vmovq\t{%1, %0|%0, %1}
>     movq2dq\t{%1, %0|%0, %1}"
> -  [(set_attr "type" "ssemov")
> +  [(set_attr "mmx_isa" "*,native")
> +   (set_attr "type" "ssemov")
>     (set_attr "prefix" "maybe_vex,orig")
>     (set_attr "mode" "TI")])
>
> @@ -14661,6 +14672,7 @@
>     %vmovq\t{%1, %0|%0, %1}
>     movq2dq\t{%1, %0|%0, %1}"
>    [(set_attr "isa" "x64,*,*")
> +   (set_attr "mmx_isa" "*,*,native")
>     (set_attr "type" "ssemov")
>     (set_attr "prefix_rex" "1,*,*")
>     (set_attr "prefix" "maybe_vex,maybe_vex,orig")
> --
> 2.20.1
>