From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yw1-x1135.google.com (mail-yw1-x1135.google.com [IPv6:2607:f8b0:4864:20::1135]) by sourceware.org (Postfix) with ESMTPS id 6452D3858D1E for ; Tue, 14 Feb 2023 16:24:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 6452D3858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-yw1-x1135.google.com with SMTP id 00721157ae682-4a263c4ddbaso214347597b3.0 for ; Tue, 14 Feb 2023 08:24:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=Vz9/m8/BSh6IX19949gMWVaRrUdk7bWFi7FYhZL+Akc=; b=G6JLyw3uXzcSFtHniKQ9c6EedCOZJr809rwFkuyEnkiL5Q6PRnWiQg0M9yd/Jhu0nK scOX5CkqmS2kcEk7UInGerNTu8o9/yyDEmFWsX7EN55vxGTXsjpg84dzIHv/GzJDFtIC +kpHqLSNvVsVxICwNJOf4I7ULh4gNl42M8JT7B4kkxl/vaS1F2hAQI1aMaumDJ/5Pdr4 edGP2Bsek0s9CQ1/cnW/wXVXK15Ykoi2rNZd8stWAOqGKi4xNPJuMXOeT7nbhYH7kxCM 75+cVBdoqhcE26fpjzZ01Gcu4VyhoNB/WOenn/B3OLL9w5+vFy9FXCHigMGXy+Y3vRau HDzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=Vz9/m8/BSh6IX19949gMWVaRrUdk7bWFi7FYhZL+Akc=; b=77rD+nDjvL6giRmuHbGo59cyaZvzB9oYXz84+/RvVofOVPzNpHu4sOfYrs78MWiX33 JJebu5jsJe9nDUaUeJ3G9KPEdBuIjeA/5SK94ElgY0aTrRKYcsplZJ26uDOaprcmJh6s Km4cEGmz2Ps4nXwuSLPkKScT7Zbx0mn4JpVGw2crDFQ+XrYiKbY486UBel4bPtzyIcEB VJhMhdrvo94VpBlh0M2lwMrqXVRko5h2Rs1PgMzL/ZWXOZVbepN9eN1XPOJ11jvg8p5Q xgJca2FU2+e4tAUP9doKmQHiCr+o4rOAMeBi8HLuEeZo98qCaHuJF7X+UNZBAZTlvPYz zlpQ== X-Gm-Message-State: AO0yUKU0trgrwGUd2tbsQn0/aWEvC2j6RupjM6as0zBWQi2f7yB0m3X7 PiIwrFpKeXPqVhrXU0F2ylp38WliQvkLIfktpBqixpw8PDk= X-Google-Smtp-Source: AK7set8KqzATf0uIRnENWbeSNhyHTeyOuSEs43idAb33MooAVfBzQC8S+E1dFM47RZkYyxClslfy2hqKlIz88KXhtcE= X-Received: by 2002:a81:4742:0:b0:527:af00:202c with SMTP id u63-20020a814742000000b00527af00202cmr358422ywa.162.1676391852587; Tue, 14 Feb 2023 08:24:12 -0800 (PST) MIME-Version: 1.0 References: <20230209142502.30F293858413@sourceware.org> In-Reply-To: <20230209142502.30F293858413@sourceware.org> From: Uros Bizjak Date: Tue, 14 Feb 2023 17:24:01 +0100 Message-ID: Subject: Re: [PATCH] target/108738 - optimize bit operations in STV To: Richard Biener Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, Feb 9, 2023 at 3:25 PM Richard Biener via Gcc-patches wrote: > > The following does low-hanging optimizations, combining bitmap > test and set and removing redundant operations. > > This shaves off half of the testcase compile time. > > Bootstrapped and tested on x86_64-unknown-linux-gnu, OK? > > Thanks, > Richard. > > PR target/108738 > * config/i386/i386-features.cc (scalar_chain::add_to_queue): > Combine bitmap test and set. > (scalar_chain::add_insn): Likewise. > (scalar_chain::analyze_register_chain): Remove redundant > attempt to add to queue and instead strengthen assert. > Sink common attempts to mark the def dual-mode. > (scalar_chain::add_to_queue): Remove redundant insn bitmap > check. LGTM. Thanks, Uros. > --- > gcc/config/i386/i386-features.cc | 18 ++++++++---------- > 1 file changed, 8 insertions(+), 10 deletions(-) > > diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc > index 9bd6d8677bb..eff91301009 100644 > --- a/gcc/config/i386/i386-features.cc > +++ b/gcc/config/i386/i386-features.cc > @@ -314,14 +314,12 @@ scalar_chain::~scalar_chain () > void > scalar_chain::add_to_queue (unsigned insn_uid) > { > - if (bitmap_bit_p (insns, insn_uid) > - || bitmap_bit_p (queue, insn_uid)) > + if (!bitmap_set_bit (queue, insn_uid)) > return; > > if (dump_file) > fprintf (dump_file, " Adding insn %d into chain's #%d queue\n", > insn_uid, chain_id); > - bitmap_set_bit (queue, insn_uid); > } > > /* For DImode conversion, mark register defined by DEF as requiring > @@ -362,10 +360,9 @@ void > scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref) > { > df_link *chain; > + bool mark_def = false; > > - gcc_assert (bitmap_bit_p (insns, DF_REF_INSN_UID (ref)) > - || bitmap_bit_p (candidates, DF_REF_INSN_UID (ref))); > - add_to_queue (DF_REF_INSN_UID (ref)); > + gcc_checking_assert (bitmap_bit_p (insns, DF_REF_INSN_UID (ref))); > > for (chain = DF_REF_CHAIN (ref); chain; chain = chain->next) > { > @@ -398,9 +395,12 @@ scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref) > if (dump_file) > fprintf (dump_file, " r%d use in insn %d isn't convertible\n", > DF_REF_REGNO (chain->ref), uid); > - mark_dual_mode_def (ref); > + mark_def = true; > } > } > + > + if (mark_def) > + mark_dual_mode_def (ref); > } > > /* Add instruction into a chain. */ > @@ -408,14 +408,12 @@ scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref) > void > scalar_chain::add_insn (bitmap candidates, unsigned int insn_uid) > { > - if (bitmap_bit_p (insns, insn_uid)) > + if (!bitmap_set_bit (insns, insn_uid)) > return; > > if (dump_file) > fprintf (dump_file, " Adding insn %d to chain #%d\n", insn_uid, chain_id); > > - bitmap_set_bit (insns, insn_uid); > - > rtx_insn *insn = DF_INSN_UID_GET (insn_uid)->insn; > rtx def_set = single_set (insn); > if (def_set && REG_P (SET_DEST (def_set)) > -- > 2.35.3