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From: Uros Bizjak <ubizjak@gmail.com>
To: gcc-patches@gcc.gnu.org
Cc: "Jagasia, Harsha" <harsha.jagasia@amd.com>, Jan Hubicka <hubicka@ucw.cz>
Subject: Re: AMD bdver2 enablement.
Date: Tue, 12 Jul 2011 08:24:00 -0000	[thread overview]
Message-ID: <CAFULd4Z3BAGuCs=iek45aWRHxGY=Ai2a927qopQVq3z2yrP=RQ@mail.gmail.com> (raw)

Hello!

> 2011-07-11  Harsha Jagasia  <harsha.jagasia@amd.com>
>
> 	AMD bdver2 Enablement
> 	* config.gcc (i[34567]86-*-linux* | ...): Add bdver2.
> 	(case ${target}): Add bdver2.
> 	* config/i386/driver-i386.c (host_detect_local_cpu): Let
> 	-march=native recognize bdver2 processors.
> 	* config/i386/i386-c.c (ix86_target_macros_internal): Add
> 	bdver2 def_and_undef
> 	* config/i386/i386.c (struct processor_costs bdver2_cost): New
> 	bdver2 cost table.
> 	(m_BDVER2): New definition.
> 	(m_AMD_MULTIPLE): Includes m_BDVER2.
> 	(initial_ix86_tune_features): Add bdver2 tuning.
> 	(processor_target_table): Add bdver2 entry.
> 	(static const char *const cpu_names): Add bdver2 entry.
> 	(ix86_option_override_internal): Add bdver2 instruction sets.
> 	(ix86_issue_rate): Add bdver2.
> 	(ix86_adjust_cost): Add bdver2.
> 	(has_dispatch): Add bdver2.
> 	* config/i386/i386.h (TARGET_BDVER2): New definition.
> 	(enum target_cpu_default): Add TARGET_CPU_DEFAULT_bdver2.
> 	(enum processor_type): Add PROCESSOR_BDVER2.
> 	* config/i386/i386.md (define_attr "cpu"): Add bdver2.
> 	* config/i386/i386.opt ( mdispatch-scheduler): Add bdver2 to
> 	description.

OK, with a small change - see below.

@@ -1813,8 +1900,10 @@ const struct processor_costs *ix86_cost
 #define m_ATHLON_K8  (m_K8 | m_ATHLON)
 #define m_AMDFAM10  (1<<PROCESSOR_AMDFAM10)
 #define m_BDVER1  (1<<PROCESSOR_BDVER1)
+#define m_BDVER2  (1<<PROCESSOR_BDVER2)
 #define m_BTVER1  (1<<PROCESSOR_BTVER1)
-#define m_AMD_MULTIPLE  (m_K8 | m_ATHLON | m_AMDFAM10 | m_BDVER1 | m_BTVER1)
+#define m_BDVER	 (m_BDVER1 | m_BDVER2)
+#define m_AMD_MULTIPLE  (m_ATHLON_K8 | m_AMDFAM10 | m_BDVER | m_BTVER1)

 #define m_GENERIC32 (1<<PROCESSOR_GENERIC32)
 #define m_GENERIC64 (1<<PROCESSOR_GENERIC64)
@@ -1856,8 +1945,8 @@ static unsigned int initial_ix86_tune_fe
   ~m_386,

   /* X86_TUNE_USE_SAHF */
-  m_ATOM | m_PPRO | m_K6_GEODE | m_K8 | m_AMDFAM10 | m_BDVER1 | m_BTVER1
-  | m_PENT4 | m_NOCONA | m_CORE2I7 | m_GENERIC,
+  m_ATOM | m_PPRO | m_K6_GEODE | m_K8 | m_AMDFAM10 | m_BDVER1 | m_BDVER2
+  | m_BTVER1 | m_PENT4 | m_NOCONA | m_CORE2I7 | m_GENERIC,

Please use newly introduced m_BDVER in tune flags instead of "m_BDVER1
| m_BDVER2".

Thanks,
Uros.

             reply	other threads:[~2011-07-12  6:42 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-07-12  8:24 Uros Bizjak [this message]
  -- strict thread matches above, loose matches on Subject: below --
2011-07-11 19:03 harsha.jagasia
2011-07-15 16:22 ` Gerald Pfeifer

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